| Age | Commit message (Expand) | Author |
|---|
| 2015-04-14 | config, cpu: fix progress interval for switched CPUs | Malek Musleh |
| 2015-01-10 | cpu: fix RetiredStores probe point | Nikos Nikoleris |
| 2014-11-14 | arm: Fixes based on UBSan and static analysis | Andreas Hansson |
| 2014-11-06 | x86 isa: This patch attempts an implementation at mwait. | Marc Orr |
| 2014-10-16 | cpu: Probe points for basic PMU stats | Andreas Sandberg |
| 2014-05-09 | arch, arm: Preserve TLB bootUncacheability when switching CPUs | Geoffrey Blake |
| 2014-05-09 | cpu, arm: Allow the specification of a socket field | Akash Bagdia |
| 2013-11-25 | sim: simulate with multiple threads and event queues | Steve Reinhardt ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E%2C%20Ali%20Saidi%20%3CAli.Saidi%40ARM.com%3E) |
| 2013-07-18 | mem: Set the cache line size on a system level | Andreas Hansson |
| 2013-06-11 | cpu: Add support for scheduling multiple inst/load stop events | Andreas Sandberg |
| 2013-04-22 | cpu: generate SimPoint basic block vector profiles | Dam Sunwoo |
| 2013-03-26 | cpu: Remove CpuPort and use MasterPort in the CPU classes | Andreas Hansson |
| 2013-02-15 | cpu: Refactor memory system checks | Andreas Sandberg |
| 2013-01-07 | cpu: Unify the serialization code for all of the CPU models | Andreas Sandberg |
| 2013-01-07 | cpu: Flush TLBs on switchOut() | Andreas Sandberg |
| 2013-01-07 | cpu: Rename defer_registration->switched_out | Andreas Sandberg |
| 2013-01-07 | cpu: Introduce sanity checks when switching between CPUs | Andreas Sandberg |
| 2013-01-07 | arch: Make the ISA class inherit from SimObject | Andreas Sandberg |
| 2012-11-02 | ARM: dump stats and process info on context switches | Dam Sunwoo |
| 2012-10-15 | Port: Add protocol-agnostic ports in the port hierarchy | Andreas Hansson |
| 2012-09-12 | Base CPU: Initialize profileEvent to NULL | Joel Hestness |
| 2012-08-28 | Clock: Rework clocks to avoid tick-to-cycle transformations | Andreas Hansson |
| 2012-08-28 | Port: Stricter port bind/unbind semantics | Andreas Hansson |
| 2012-08-21 | Clock: Move the clock and related functions to ClockedObject | Andreas Hansson |
| 2012-08-15 | O3,ARM: fix some problems with drain/switchout functionality and add Drain DP... | Anthony Gutierrez |
| 2012-07-09 | Fix: Address a few benign memory leaks | Andreas Hansson |
| 2012-05-01 | MEM: Separate requests and responses for timing accesses | Andreas Hansson |
| 2012-04-14 | MEM: Separate snoops and normal memory requests/responses | Andreas Hansson |
| 2012-03-30 | MEM: Introduce the master/slave port sub-classes in C++ | William Wang |
| 2012-03-09 | CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable | Geoffrey Blake |
| 2012-03-02 | CPU: Check that the interrupt controller is created when needed | Andreas Hansson |
| 2012-02-24 | CPU: Round-two unifying instr/data CPU ports across models | Andreas Hansson |
| 2012-02-12 | cpu: add separate stats for insts/ops both globally and per cpu model | Anthony Gutierrez |
| 2012-02-12 | mem: Add a master ID to each request object. | Ali Saidi |
| 2012-01-31 | Merge with head, hopefully the last time for this batch. | Gabe Black |
| 2012-01-31 | clang: Enable compiling gem5 using clang 2.9 and 3.0 | Koan-Sin Tan |
| 2012-01-31 | CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5 | Geoffrey Blake |
| 2012-01-28 | Merge with the main repo. | Gabe Black |
| 2012-01-17 | MEM: Separate queries for snooping and address ranges | Andreas Hansson |
| 2012-01-17 | CPU: Moving towards a more general port across CPU models | Andreas Hansson |
| 2012-01-07 | Merge with the main repository again. | Gabe Black |
| 2012-01-07 | Merge with main repository. | Gabe Black |
| 2011-12-01 | Output: Add hierarchical output support and cleanup existing codebase. | Chris Emmons |
| 2011-11-18 | SE/FS: Get rid of FULL_SYSTEM in the CPU directory. | Gabe Black |
| 2011-11-01 | SE/FS: Expose the same methods on the CPUs in SE and FS modes. | Gabe Black |
| 2011-10-31 | GCC: Get everything working with gcc 4.6.1. | Gabe Black |
| 2011-10-09 | SE/FS: Build the Interrupt objects in SE mode. | Gabe Black |
| 2011-04-15 | trace: reimplement the DTRACE function so it doesn't use a vector | Nathan Binkert |
| 2011-04-15 | includes: sort all includes | Nathan Binkert |
| 2011-02-06 | m5: added work completed monitoring support | Brad Beckmann |
