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path: root/src/cpu/base.hh
AgeCommit message (Expand)Author
2015-08-21cpu: Move invldPid constant from Request to BaseCPUAndreas Hansson
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-01-25cpu: remove legion tracerAli Saidi
2014-11-06x86 isa: This patch attempts an implementation at mwait.Marc Orr
2014-10-16cpu: Probe points for basic PMU statsAndreas Sandberg
2014-09-20cpu: Remove unused deallocateContext callsMitch Hayenga
2014-09-20alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivateMitch Hayenga
2014-05-09cpu, arm: Allow the specification of a socket fieldAkash Bagdia
2014-03-07cpu: Make CPU and ThreadContext getters constAndreas Hansson
2014-01-24cpu: Add CPU support for generatig wake up events when LLSC adresses are snoo...Ali Saidi
2013-09-04arch: Resurrect the NOISA build target and rename it NULLAndreas Hansson
2013-07-19cpu: Remove unused getBranchPred() method from BaseCPUAndreas Sandberg
2013-07-18mem: Set the cache line size on a system levelAndreas Hansson
2013-06-11cpu: Add support for scheduling multiple inst/load stop eventsAndreas Sandberg
2013-04-22kvm: Avoid synchronizing the TC on every KVM exitAndreas Sandberg
2013-03-26cpu: Remove CpuPort and use MasterPort in the CPU classesAndreas Hansson
2013-02-15cpu: Refactor memory system checksAndreas Sandberg
2013-01-07cpu: Unify the serialization code for all of the CPU modelsAndreas Sandberg
2013-01-07cpu: Flush TLBs on switchOut()Andreas Sandberg
2013-01-07cpu: Introduce sanity checks when switching between CPUsAndreas Sandberg
2012-11-02ARM: dump stats and process info on context switchesDam Sunwoo
2012-10-15Port: Add protocol-agnostic ports in the port hierarchyAndreas Hansson
2012-09-25sim: Move CPU-specific methods from SimObject to the BaseCPU classAndreas Sandberg
2012-08-28Clock: Add a Cycles wrapper class and use where applicableAndreas Hansson
2012-08-21Clock: Move the clock and related functions to ClockedObjectAndreas Hansson
2012-05-26CPU: Merge the predecoder and decoder.Gabe Black
2012-05-01MEM: Separate requests and responses for timing accessesAndreas Hansson
2012-04-14MEM: Separate snoops and normal memory requests/responsesAndreas Hansson
2012-04-03Atomic: Remove the physmem_port and access memory directlyAndreas Hansson
2012-03-30MEM: Introduce the master/slave port sub-classes in C++William Wang
2012-03-19clang: Fix recently introduced clang compilation errorsAndreas Hansson
2012-03-02CPU: Check that the interrupt controller is created when neededAndreas Hansson
2012-02-24CPU: Round-two unifying instr/data CPU ports across modelsAndreas Hansson
2012-02-12cpu: add separate stats for insts/ops both globally and per cpu modelAnthony Gutierrez
2012-02-12mem: Add a master ID to each request object.Ali Saidi
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31clang: Enable compiling gem5 using clang 2.9 and 3.0Koan-Sin Tan
2012-01-28Merge with the main repo.Gabe Black
2012-01-16Merge yet again with the main repository.Gabe Black
2012-01-17MEM: Separate queries for snooping and address rangesAndreas Hansson
2012-01-17CPU: Moving towards a more general port across CPU modelsAndreas Hansson
2012-01-09O3: Add support of function tracing with O3 CPU.Ali Saidi
2011-11-18SE/FS: Get rid of includes of config/full_system.hh.Gabe Black
2011-11-18SE/FS: Get rid of FULL_SYSTEM in the CPU directory.Gabe Black
2011-11-01SE/FS: Expose the same methods on the CPUs in SE and FS modes.Gabe Black
2011-10-09SE/FS: Build the Interrupt objects in SE mode.Gabe Black
2011-04-15includes: sort all includesNathan Binkert
2011-03-26mips: cleanup ISA-specific codeKorey Sewell
2011-02-06m5: added work completed monitoring supportBrad Beckmann
2011-02-06mcpat: Adds McPAT performance countersJoel Hestness
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