gem5 - gem5

Age	Commit message (Expand)	Author
2014-10-16	cpu: Probe points for basic PMU stats	Andreas Sandberg
2014-09-20	cpu: Remove unused deallocateContext calls	Mitch Hayenga
2014-09-20	alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate	Mitch Hayenga
2014-05-09	cpu, arm: Allow the specification of a socket field	Akash Bagdia
2014-03-07	cpu: Make CPU and ThreadContext getters const	Andreas Hansson
2014-01-24	cpu: Add CPU support for generatig wake up events when LLSC adresses are snoo...	Ali Saidi
2013-09-04	arch: Resurrect the NOISA build target and rename it NULL	Andreas Hansson
2013-07-19	cpu: Remove unused getBranchPred() method from BaseCPU	Andreas Sandberg
2013-07-18	mem: Set the cache line size on a system level	Andreas Hansson
2013-06-11	cpu: Add support for scheduling multiple inst/load stop events	Andreas Sandberg
2013-04-22	kvm: Avoid synchronizing the TC on every KVM exit	Andreas Sandberg
2013-03-26	cpu: Remove CpuPort and use MasterPort in the CPU classes	Andreas Hansson
2013-02-15	cpu: Refactor memory system checks	Andreas Sandberg
2013-01-07	cpu: Unify the serialization code for all of the CPU models	Andreas Sandberg
2013-01-07	cpu: Flush TLBs on switchOut()	Andreas Sandberg
2013-01-07	cpu: Introduce sanity checks when switching between CPUs	Andreas Sandberg
2012-11-02	ARM: dump stats and process info on context switches	Dam Sunwoo
2012-10-15	Port: Add protocol-agnostic ports in the port hierarchy	Andreas Hansson
2012-09-25	sim: Move CPU-specific methods from SimObject to the BaseCPU class	Andreas Sandberg
2012-08-28	Clock: Add a Cycles wrapper class and use where applicable	Andreas Hansson
2012-08-21	Clock: Move the clock and related functions to ClockedObject	Andreas Hansson
2012-05-26	CPU: Merge the predecoder and decoder.	Gabe Black
2012-05-01	MEM: Separate requests and responses for timing accesses	Andreas Hansson
2012-04-14	MEM: Separate snoops and normal memory requests/responses	Andreas Hansson
2012-04-03	Atomic: Remove the physmem_port and access memory directly	Andreas Hansson
2012-03-30	MEM: Introduce the master/slave port sub-classes in C++	William Wang
2012-03-19	clang: Fix recently introduced clang compilation errors	Andreas Hansson
2012-03-02	CPU: Check that the interrupt controller is created when needed	Andreas Hansson
2012-02-24	CPU: Round-two unifying instr/data CPU ports across models	Andreas Hansson
2012-02-12	cpu: add separate stats for insts/ops both globally and per cpu model	Anthony Gutierrez
2012-02-12	mem: Add a master ID to each request object.	Ali Saidi
2012-01-31	Merge with head, hopefully the last time for this batch.	Gabe Black
2012-01-31	clang: Enable compiling gem5 using clang 2.9 and 3.0	Koan-Sin Tan
2012-01-28	Merge with the main repo.	Gabe Black
2012-01-16	Merge yet again with the main repository.	Gabe Black
2012-01-17	MEM: Separate queries for snooping and address ranges	Andreas Hansson
2012-01-17	CPU: Moving towards a more general port across CPU models	Andreas Hansson
2012-01-09	O3: Add support of function tracing with O3 CPU.	Ali Saidi
2011-11-18	SE/FS: Get rid of includes of config/full_system.hh.	Gabe Black
2011-11-18	SE/FS: Get rid of FULL_SYSTEM in the CPU directory.	Gabe Black
2011-11-01	SE/FS: Expose the same methods on the CPUs in SE and FS modes.	Gabe Black
2011-10-09	SE/FS: Build the Interrupt objects in SE mode.	Gabe Black
2011-04-15	includes: sort all includes	Nathan Binkert
2011-03-26	mips: cleanup ISA-specific code	Korey Sewell
2011-02-06	m5: added work completed monitoring support	Brad Beckmann
2011-02-06	mcpat: Adds McPAT performance counters	Joel Hestness
2011-01-07	Replace curTick global variable with accessor functions.	Steve Reinhardt
2010-11-15	O3: Make O3 support variably lengthed instructions.	Gabe Black
2010-04-15	tick: rename Clock namespace to SimClock	Nathan Binkert
2010-01-12	since totalInstructions() is impl'ed by all the cpus, make it an abstract bas...	Lisa Hsu