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gem5
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invisispec-with-dift
is-ift
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is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
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cpu
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base.hh
Age
Commit message (
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Author
2009-03-05
stats: Fix all stats usages to deal with template fixes
Nathan Binkert
2009-01-24
cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep.
Nathan Binkert
2008-11-04
get rid of all instances of readTid() and getThreadNum(). Unify and eliminate
Lisa Hsu
2008-11-02
make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered
Lisa Hsu
2008-10-21
style: Use the correct m5 style for things relating to interrupts.
Nathan Binkert
2008-10-12
CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
Gabe Black
2008-10-12
Turn Interrupts objects into SimObjects. Also, move local APIC state into x86...
Gabe Black
2008-10-12
CPU: Eliminate the get_vec function.
Gabe Black
2008-10-11
CPU: Add a getInterruptController function
Gabe Black
2008-10-09
eventq: convert all usage of events to use the new API.
Nathan Binkert
2008-08-18
Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was ...
Richard Strong
2008-08-11
params: Convert the CPU objects to use the auto generated param structs.
Nathan Binkert
2008-02-06
Make the Event::description() a const function
Stephen Hines
2007-11-15
add core specific parameter to BaseCPU params
Korey Sewell
2007-11-13
Add in files from merge-bare-iron, get them compiling in FS and SE mode
Korey Sewell
2007-09-28
Rename cycles() function to ticks()
Ali Saidi
2007-09-28
Update statistics to use cycles properly instead of ticks
Ali Saidi
2007-07-28
Turn the instruction tracing code into pluggable sim objects.
Gabe Black
2007-03-15
Merge zizzer.eecs.umich.edu:/bk/newmem
Gabe Black
2007-03-15
Make the predecoder an object with it's own switched header file. Start addin...
Gabe Black
2007-03-09
Two fixes:
Kevin Lim
2007-03-03
Implement Niagara I/O interface and rework interrupts
Ali Saidi
2007-01-30
Make SPARC checkpointing work
Ali Saidi
2007-01-26
eliminate cpu checkInterrupts bool, it is redundant and unnecessary.
Lisa Hsu
2007-01-08
the way i understand it, interrupts in m5 is a little bloated. the usage of ...
Lisa Hsu
2006-12-04
More changes to get SPARC fs closer. Now at 1.2M cycles before difference
Ali Saidi
2006-11-14
Make cpu's capable of having a phase shift
Ron Dreslinski
2006-11-11
Get rid of the ParamContext for pseudo instructions and move
Nathan Binkert
2006-11-06
Merge zizzer.eecs.umich.edu:/bk/newmem/
Gabe Black
2006-11-06
Clean up clock phase drift code a bit.
Kevin Lim
2006-11-03
Got rid of "inPalMode". Some places are still effectively checking if they ar...
Gabe Black
2006-11-03
Add a new file which describes an ISA's interrupt handling mechanism. It reco...
Gabe Black
2006-10-08
Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)
Steve Reinhardt
2006-10-02
Updates to fix merge issues and bring almost everything up to working speed. ...
Kevin Lim
2006-09-30
Merge ktlim@zamp:./local/clean/o3-merge/m5
Kevin Lim
2006-07-07
Update cpus to use the getPort function to use a connector object to connect ...
Ron Dreslinski
2006-07-05
Remove sampler and serializer. Now they are handled through C++ interacting ...
Kevin Lim
2006-06-29
Various fixes for the CPU models to support the features that have been moved...
Kevin Lim
2006-06-06
Change ExecContext to ThreadContext. This is being renamed to differentiate ...
Kevin Lim
2006-06-02
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-05-31
Updated Authors from bk prs info
Ali Saidi
2006-05-30
Merge ktlim@zizzer:/bk/m5
Kevin Lim
2006-05-22
New directory structure:
Steve Reinhardt
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