gem5 - gem5

Age	Commit message (Expand)	Author
2010-08-13	CPU: Add readBytes and writeBytes functions to the exec contexts.	Gabe Black
2010-02-20	BaseDynInst: Preserve the faults returned from read and write.	Timothy M. Jones
2010-02-12	O3PCU: Split loads and stores that cross cache line boundaries.	Timothy M. Jones
2010-02-12	BaseDynInst: Make the TLB translation timing instead of atomic.	Timothy M. Jones
2009-09-23	arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh	Nathan Binkert
2009-08-01	Fix setting of INST_FETCH flag for O3 CPU.	Steve Reinhardt
2009-05-26	types: add a type for thread IDs and try to use it everywhere	Nathan Binkert
2009-04-08	tlb: More fixing of unified TLB	Nathan Binkert
2009-02-25	ISA: Replace the translate functions in the TLBs with translateAtomic.	Gabe Black
2009-02-25	CPU: Get rid of translate... functions from various interface classes.	Gabe Black
2008-11-10	O3CPU: Make the instcount debugging stuff per-cpu.	Clint Smullen
2008-11-02	Add in Context IDs to the simulator. From now on, cpuId is almost never used,	Lisa Hsu
2008-11-02	make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered	Lisa Hsu
2008-09-10	style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...	Ali Saidi
2008-02-26	TLB: Make a TLB base class and put a virtual demapPage function in it.	Gabe Black
2007-10-22	CPU: Add functions to the "ExecContext"s that translate a given address.	Gabe Black
2007-08-26	O3 CPU: Remove alignment check from dynamic instruction read/write functions.	Gabe Black
2007-07-31	Add a flag to indicate an instruction triggers a syscall in SE mode.	Gabe Black
2007-06-20	Fix compiler errors.	Gabe Black
2007-04-14	Add support for microcode and pull out the special branch delay slot handling...	Gabe Black
2007-04-13	Remove most of the special handling for delay slots since they have to be squ...	Gabe Black
2007-04-08	Get the "hard" SPARC instructions working in o3. I don't like that the IsStor...	Gabe Black
2007-03-23	Two fixes:	Kevin Lim
2006-12-28	Implement a stub nnpc for alpha that is read only as npc+4.	Gabe Black
2006-12-16	Accidently "cleaned" away the NPC parameter to the constructor.	Gabe Black
2006-12-16	Added a predicted NPC field, explicitly stored whether the instruction was pr...	Gabe Black
2006-12-12	Merge zizzer:/bk/newmem/	Gabe Black
2006-12-12	Rename the StaticInst-based (read\|set)(Int\|Float)Reg methods to (read\|set)(In...	Steve Reinhardt
2006-12-06	Get rid of some typedefs which were hardly used, and move some stuff back her...	Gabe Black
2006-10-23	Add in support for LL/SC in the O3 CPU. Needs to be fully tested.	Kevin Lim
2006-10-02	Updates to fix merge issues and bring almost everything up to working speed. ...	Kevin Lim
2006-09-30	Merge ktlim@zamp:./local/clean/o3-merge/m5	Kevin Lim
2006-08-31	add ISA_HAS_DELAY_SLOT directive instead of "#if THE_ISA == ALPHA_ISA" throug...	Korey Sewell
2006-07-23	This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds,...	Korey Sewell
2006-06-16	Two updates that got combined into one ChangeSet accidentally. They're both ...	Kevin Lim
2006-06-14	Minor code cleanup of BaseDynInst.	Kevin Lim
2006-06-12	Clean up/shift some code around.	Kevin Lim
2006-06-09	Fix allocating requests twice on retries.	Kevin Lim
2006-06-08	Get O3 CPU mostly working in full system, and fix an FP bug that showed up.	Kevin Lim
2006-06-07	Reorganization/renaming of CPUExecContext. Now it is called SimpleThread in ...	Kevin Lim
2006-06-06	Change ExecContext to ThreadContext. This is being renamed to differentiate ...	Kevin Lim
2006-06-05	Fixes to get new CPU model working for simple test case. The CPU does not ye...	Kevin Lim
2006-06-02	Merge ktlim@zizzer:/bk/newmem	Kevin Lim
2006-06-02	Fixes to get compiling to work. This is mainly fixing up some includes; chan...	Kevin Lim
2006-05-31	Updated Authors from bk prs info	Ali Saidi
2006-05-30	Merge ktlim@zizzer:/bk/m5	Kevin Lim
2006-05-22	New directory structure:	Steve Reinhardt