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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
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path:
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src
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cpu
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checker
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cpu.hh
Age
Commit message (
Expand
)
Author
2012-05-26
CPU: Merge the predecoder and decoder.
Gabe Black
2012-03-30
MEM: Introduce the master/slave port sub-classes in C++
William Wang
2012-03-09
CheckerCPU: Add function stubs to non-ARM ISA source to compile with CheckerCPU
Geoffrey Blake
2012-03-09
CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
Geoffrey Blake
2012-02-12
mem: Add a master ID to each request object.
Ali Saidi
2012-01-31
Merge with head, hopefully the last time for this batch.
Gabe Black
2012-01-31
CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5
Geoffrey Blake
2011-11-18
SE/FS: Get rid of includes of config/full_system.hh.
Gabe Black
2011-11-18
SE/FS: Get rid of FULL_SYSTEM in the CPU directory.
Gabe Black
2011-04-15
includes: sort all includes
Nathan Binkert
2010-11-08
ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.
Ali Saidi
2010-10-31
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
Gabe Black
2010-08-31
CPU: Get rid of the unused ev5_trap function on the simple and checker CPUs.
Gabe Black
2010-06-03
Minor remote GDB cleanup.
Steve Reinhardt
2009-07-08
Registers: Get rid of the float register width parameter.
Gabe Black
2009-04-08
tlb: Don't separate the TLB classes into an instruction TLB and a data TLB
Gabe Black
2009-02-25
CPU: Get rid of translate... functions from various interface classes.
Gabe Black
2008-10-20
O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo...
Ali Saidi
2008-10-11
CPU: Eliminate the simPalCheck funciton.
Gabe Black
2008-10-11
CPU: Eliminate the hwrei function.
Gabe Black
2008-09-10
style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...
Ali Saidi
2008-08-11
params: Convert the CPU objects to use the auto generated param structs.
Nathan Binkert
2008-02-26
TLB: Make a TLB base class and put a virtual demapPage function in it.
Gabe Black
2007-03-07
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
Ali Saidi
2006-12-12
Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(In...
Steve Reinhardt
2006-11-03
Got rid of "inPalMode". Some places are still effectively checking if they ar...
Gabe Black
2006-11-01
Merge zizzer.eecs.umich.edu:/bk/newmem/
Gabe Black
2006-11-01
Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...
Gabe Black
2006-10-31
Remove mem parameter. Now the translating port asks the CPU's dcache's peer ...
Kevin Lim
2006-10-31
Move IntrFlag into the MiscRegFile and get rid of specialized accessor functi...
Gabe Black
2006-10-02
Updates to fix merge issues and bring almost everything up to working speed. ...
Kevin Lim
2006-09-30
Merge ktlim@zamp:./local/clean/o3-merge/m5
Kevin Lim
2006-07-19
Minor changes to reflect state used for regression stats.
Kevin Lim
2006-07-07
Support Ron's changes for hooking up ports.
Kevin Lim
2006-07-05
Remove sampler and serializer. Now they are handled through C++ interacting ...
Kevin Lim
2006-06-16
Checker updates.
Kevin Lim
2006-06-08
Get O3 CPU mostly working in full system, and fix an FP bug that showed up.
Kevin Lim
2006-06-07
Update copyright.
Kevin Lim
2006-06-07
Reorganization/renaming of CPUExecContext. Now it is called SimpleThread in ...
Kevin Lim
2006-06-06
Change ExecContext to ThreadContext. This is being renamed to differentiate ...
Kevin Lim
2006-06-06
Fix checker to work in newmem in SE mode.
Kevin Lim
2006-06-04
Merge ktlim@zamp:/z/ktlim2/clean/m5-o3
Kevin Lim
2006-06-02
Fixes to get compiling to work. This is mainly fixing up some includes; chan...
Kevin Lim