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is-ift
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is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
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cpu.hh
Age
Commit message (
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Author
2017-07-05
cpu: Simplify the rename interface and use RegId
Rekai Gonzalez-Alberquilla
2017-07-05
arch, cpu: Architectural Register structural indexing
Nathanael Premillieu
2015-07-20
syscall_emul: [patch 13/22] add system call retry capability
Brandon Potter
2016-08-15
cpu, arch: fix the type used for the request flags
Nikos Nikoleris
2016-02-23
scons: Add missing override to appease clang
Andreas Hansson
2015-10-12
misc: Add explicit overrides and fix other clang >= 3.5 issues
Andreas Hansson
2015-10-12
misc: Remove redundant compiler-specific defines
Andreas Hansson
2015-09-30
cpu,isa,mem: Add per-thread wakeup logic
Mitch Hayenga
2015-09-30
cpu: Add per-thread monitors
Mitch Hayenga
2015-07-28
revert 5af8f40d8f2c
Nilay Vaish
2015-07-26
cpu: implements vector registers
Nilay Vaish
2015-07-07
sim: Refactor the serialization base class
Andreas Sandberg
2015-02-16
arch: Make readMiscRegNoEffect const throughout
Andreas Hansson
2014-11-06
x86 isa: This patch attempts an implementation at mwait.
Marc Orr
2014-09-19
arch: Pass faults by const reference where possible
Andreas Hansson
2014-09-03
arch, cpu: Factor out the ExecContext into a proper base class
Andreas Sandberg
2014-01-24
checker: CheckerCPU handling of MiscRegs was incorrect
Geoffrey Blake
2013-10-15
cpu: add a condition-code register class
Yasuko Eckert
2013-10-15
cpu: rename *_DepTag constants to *_Reg_Base
Steve Reinhardt
2013-03-26
cpu: Remove CpuPort and use MasterPort in the CPU classes
Andreas Hansson
2012-08-28
Checker: Fix checker CPU ports
Andreas Hansson
2012-05-26
CPU: Merge the predecoder and decoder.
Gabe Black
2012-03-30
MEM: Introduce the master/slave port sub-classes in C++
William Wang
2012-03-09
CheckerCPU: Add function stubs to non-ARM ISA source to compile with CheckerCPU
Geoffrey Blake
2012-03-09
CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
Geoffrey Blake
2012-02-12
mem: Add a master ID to each request object.
Ali Saidi
2012-01-31
Merge with head, hopefully the last time for this batch.
Gabe Black
2012-01-31
CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5
Geoffrey Blake
2011-11-18
SE/FS: Get rid of includes of config/full_system.hh.
Gabe Black
2011-11-18
SE/FS: Get rid of FULL_SYSTEM in the CPU directory.
Gabe Black
2011-04-15
includes: sort all includes
Nathan Binkert
2010-11-08
ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.
Ali Saidi
2010-10-31
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
Gabe Black
2010-08-31
CPU: Get rid of the unused ev5_trap function on the simple and checker CPUs.
Gabe Black
2010-06-03
Minor remote GDB cleanup.
Steve Reinhardt
2009-07-08
Registers: Get rid of the float register width parameter.
Gabe Black
2009-04-08
tlb: Don't separate the TLB classes into an instruction TLB and a data TLB
Gabe Black
2009-02-25
CPU: Get rid of translate... functions from various interface classes.
Gabe Black
2008-10-20
O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo...
Ali Saidi
2008-10-11
CPU: Eliminate the simPalCheck funciton.
Gabe Black
2008-10-11
CPU: Eliminate the hwrei function.
Gabe Black
2008-09-10
style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...
Ali Saidi
2008-08-11
params: Convert the CPU objects to use the auto generated param structs.
Nathan Binkert
2008-02-26
TLB: Make a TLB base class and put a virtual demapPage function in it.
Gabe Black
2007-03-07
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
Ali Saidi
2006-12-12
Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(In...
Steve Reinhardt
2006-11-03
Got rid of "inPalMode". Some places are still effectively checking if they ar...
Gabe Black
2006-11-01
Merge zizzer.eecs.umich.edu:/bk/newmem/
Gabe Black
2006-11-01
Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...
Gabe Black
2006-10-31
Remove mem parameter. Now the translating port asks the CPU's dcache's peer ...
Kevin Lim
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