index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
cpu
/
checker
/
thread_context.hh
Age
Commit message (
Expand
)
Author
2007-08-26
Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
Gabe Black
2007-03-07
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
Ali Saidi
2006-11-07
Moved the switched version of kernel_stats.hh back to kern, and moved the bas...
Gabe Black
2006-11-03
Got rid of "inPalMode". Some places are still effectively checking if they ar...
Gabe Black
2006-11-01
Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...
Gabe Black
2006-10-09
Fix checker bug.
Kevin Lim
2006-08-11
Pushed most of constants.hh back into isa_traits.hh and regfile.hh and create...
Gabe Black
2006-07-10
Minor fixes.
Kevin Lim
2006-06-08
Get O3 CPU mostly working in full system, and fix an FP bug that showed up.
Kevin Lim
2006-06-07
Update copyright.
Kevin Lim
2006-06-07
Reorganization/renaming of CPUExecContext. Now it is called SimpleThread in ...
Kevin Lim
2006-06-07
Move checker's exec_context.hh to match the other changes. Also add in some ...
Kevin Lim