Age | Commit message (Expand) | Author |
2014-09-27 | arch: Use const StaticInstPtr references where possible | Andreas Hansson |
2014-09-27 | scons: Address issues related to gcc 4.9.1 | Andreas Hansson |
2014-09-20 | alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate | Mitch Hayenga |
2014-09-19 | arch: Pass faults by const reference where possible | Andreas Hansson |
2014-09-12 | style: Fix line continuation, especially in debug messages | Andrew Bardsley |
2014-05-13 | mem: Refactor assignment of Packet types | Curtis Dunham |
2014-09-03 | arch, cpu: Factor out the ExecContext into a proper base class | Andreas Sandberg |
2014-05-09 | cpu, arm: Allow the specification of a socket field | Akash Bagdia |
2014-03-07 | cpu: Make CPU and ThreadContext getters const | Andreas Hansson |
2014-01-24 | checker: CheckerCPU handling of MiscRegs was incorrect | Geoffrey Blake |
2014-01-24 | arch, cpu: Add support for flattening misc register indexes. | Ali Saidi |
2013-11-15 | cpu: Fix Checker register index use | Andreas Hansson |
2013-10-17 | cpu: add consistent guarding to *_impl.hh files. | Matt Horsnell |
2013-10-15 | cpu: add a condition-code register class | Yasuko Eckert |
2013-10-15 | cpu: rename *_DepTag constants to *_Reg_Base | Steve Reinhardt |
2013-10-15 | cpu: clean up architectural register classification | Steve Reinhardt |
2013-07-18 | mem: Set the cache line size on a system level | Andreas Hansson |
2013-03-26 | cpu: Remove CpuPort and use MasterPort in the CPU classes | Andreas Hansson |
2013-01-07 | cpu: Implement a flat register interface in thread contexts | Andreas Sandberg |
2013-01-07 | arch: Make the ISA class inherit from SimObject | Andreas Sandberg |
2013-01-07 | cpu: rename the misleading inSyscall to noSquashFromTC | Ali Saidi |
2013-01-04 | Decoder: Remove the thread context get/set from the decoder. | Gabe Black |
2012-08-28 | Clock: Add a Cycles wrapper class and use where applicable | Andreas Hansson |
2012-08-28 | Checker: Fix checker CPU ports | Andreas Hansson |
2012-05-26 | CPU: Merge the predecoder and decoder. | Gabe Black |
2012-05-25 | Decode: Make the Decoder class defined per ISA. | Gabe Black |
2012-05-10 | gem5: fix a number of use after free issues | Ali Saidi |
2012-04-14 | MEM: Remove the Broadcast destination from the packet | Andreas Hansson |
2012-04-06 | MEM: Enable multiple distributed generalized memories | Andreas Hansson |
2012-03-30 | MEM: Introduce the master/slave port sub-classes in C++ | William Wang |
2012-03-09 | CheckerCPU: Add function stubs to non-ARM ISA source to compile with CheckerCPU | Geoffrey Blake |
2012-03-09 | CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable | Geoffrey Blake |
2012-03-02 | CPU: Check that the interrupt controller is created when needed | Andreas Hansson |
2012-02-24 | MEM: Make port proxies use references rather than pointers | Andreas Hansson |
2012-02-12 | mem: Add a master ID to each request object. | Ali Saidi |
2012-02-07 | Checker: Access workload element 0 only if there is an element 0. | Gabe Black |
2012-01-31 | Merge with head, hopefully the last time for this batch. | Gabe Black |
2012-01-31 | CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5 | Geoffrey Blake |
2012-01-28 | Merge with the main repo. | Gabe Black |
2012-01-17 | MEM: Add port proxies instead of non-structural ports | Andreas Hansson |
2011-11-18 | SE/FS: Get rid of includes of config/full_system.hh. | Gabe Black |
2011-11-18 | SE/FS: Get rid of FULL_SYSTEM in the CPU directory. | Gabe Black |
2011-10-30 | SE/FS: Make getProcessPtr available in both modes, and get rid of FULL_SYSTEMs. | Gabe Black |
2011-10-16 | SE/FS: Include getMemPort in FS. | Gabe Black |
2011-10-16 | SE/FS: Build/expose vport in SE mode. | Gabe Black |
2011-10-16 | CPU: Make physPort and getPhysPort available in SE mode. | Gabe Black |
2011-04-15 | includes: sort all includes | Nathan Binkert |
2011-01-07 | Replace curTick global variable with accessor functions. | Steve Reinhardt |
2010-11-08 | ARM/Alpha/Cpu: Change prefetchs to be more like normal loads. | Ali Saidi |
2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |