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path: root/src/cpu/checker
AgeCommit message (Expand)Author
2018-04-27sim,cpu,mem,arch: Introduced MasterInfo data structureGiacomo Travaglini
2018-01-09cpu, power: Get rid of the remnants of the EA computation insts.Gabe Black
2017-12-22arch,cpu: "virtualize" the TLB interface.Gabe Black
2017-12-05cpu: Add support for CMOs in the cpu modelsNikos Nikoleris
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2017-07-05cpu: Result refactoringRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-07-05arch, cpu: Architectural Register structural indexingNathanael Premillieu
2017-02-27syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess s...Brandon Potter
2015-07-20syscall_emul: [patch 13/22] add system call retry capabilityBrandon Potter
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2016-08-15cpu, arch: fix the type used for the request flagsNikos Nikoleris
2016-04-07mem: Remove threadId from memory request classMitch Hayenga
2016-04-06Revert power patch sets with unexpected interactionsAndreas Sandberg
2016-04-05mem: Remove threadId from memory request classMitch Hayenga
2016-02-23scons: Add missing override to appease clangAndreas Hansson
2015-10-12misc: Add explicit overrides and fix other clang >= 3.5 issuesAndreas Hansson
2015-10-12misc: Remove redundant compiler-specific definesAndreas Hansson
2015-09-30cpu,isa,mem: Add per-thread wakeup logicMitch Hayenga
2015-09-30cpu: Add per-thread monitorsMitch Hayenga
2015-08-07base: Declare a type for context IDsAndreas Sandberg
2015-07-28revert 5af8f40d8f2cNilay Vaish
2015-07-26cpu: implements vector registersNilay Vaish
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-02-16arch: Make readMiscRegNoEffect const throughoutAndreas Hansson
2015-02-11sim: Move the BaseTLB to src/arch/generic/Andreas Sandberg
2015-01-25cpu: Remove all notion that we know when the cpu is misspeculating.Ali Saidi
2015-01-22mem: Clean up Request initialisationAndreas Hansson
2014-11-06x86 isa: This patch attempts an implementation at mwait.Marc Orr
2014-10-29cpu: Add support to checker for CACHE_BLOCK_ZERO commands.Ali Saidi
2014-10-09cpu: Remove Ozone CPU from the source treeMitch Hayenga
2014-09-27arch: Use const StaticInstPtr references where possibleAndreas Hansson
2014-09-27scons: Address issues related to gcc 4.9.1Andreas Hansson
2014-09-20alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivateMitch Hayenga
2014-09-19arch: Pass faults by const reference where possibleAndreas Hansson
2014-09-12style: Fix line continuation, especially in debug messagesAndrew Bardsley
2014-05-13mem: Refactor assignment of Packet typesCurtis Dunham
2014-09-03arch, cpu: Factor out the ExecContext into a proper base classAndreas Sandberg
2014-05-09cpu, arm: Allow the specification of a socket fieldAkash Bagdia
2014-03-07cpu: Make CPU and ThreadContext getters constAndreas Hansson
2014-01-24checker: CheckerCPU handling of MiscRegs was incorrectGeoffrey Blake
2014-01-24arch, cpu: Add support for flattening misc register indexes.Ali Saidi
2013-11-15cpu: Fix Checker register index useAndreas Hansson
2013-10-17cpu: add consistent guarding to *_impl.hh files.Matt Horsnell
2013-10-15cpu: add a condition-code register classYasuko Eckert
2013-10-15cpu: rename *_DepTag constants to *_Reg_BaseSteve Reinhardt
2013-10-15cpu: clean up architectural register classificationSteve Reinhardt
2013-07-18mem: Set the cache line size on a system levelAndreas Hansson
2013-03-26cpu: Remove CpuPort and use MasterPort in the CPU classesAndreas Hansson
2013-01-07cpu: Implement a flat register interface in thread contextsAndreas Sandberg