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path: root/src/cpu/checker
AgeCommit message (Expand)Author
2012-02-12mem: Add a master ID to each request object.Ali Saidi
2012-02-07Checker: Access workload element 0 only if there is an element 0.Gabe Black
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5Geoffrey Blake
2012-01-28Merge with the main repo.Gabe Black
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
2011-11-18SE/FS: Get rid of includes of config/full_system.hh.Gabe Black
2011-11-18SE/FS: Get rid of FULL_SYSTEM in the CPU directory.Gabe Black
2011-10-30SE/FS: Make getProcessPtr available in both modes, and get rid of FULL_SYSTEMs.Gabe Black
2011-10-16SE/FS: Include getMemPort in FS.Gabe Black
2011-10-16SE/FS: Build/expose vport in SE mode.Gabe Black
2011-10-16CPU: Make physPort and getPhysPort available in SE mode.Gabe Black
2011-04-15includes: sort all includesNathan Binkert
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
2010-11-08ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.Ali Saidi
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-09-13CPU: Get rid of the now unnecessary getInst/setInst family of functions.Gabe Black
2010-09-13Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.Gabe Black
2010-08-31CPU: Get rid of the unused ev5_trap function on the simple and checker CPUs.Gabe Black
2010-06-03Minor remote GDB cleanup.Steve Reinhardt
2010-02-26cpu_models: get rid of cpu_models.py and move the stuff into SConsNathan Binkert
2009-11-10Mem: Eliminate the NO_FAULT request flag.Gabe Black
2009-09-23arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hhNathan Binkert
2009-07-08Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.Gabe Black
2009-07-08Registers: Get rid of the float register width parameter.Gabe Black
2009-04-19Mem: Change isLlsc to isLLSC.Gabe Black
2009-04-19Memory: Rename LOCKED for load locked store conditional to LLSC.Gabe Black
2009-04-15ThreadState: initialize status to Halted in constructor.Steve Reinhardt
2009-04-15Get rid of the Unallocated thread context state.Steve Reinhardt
2009-04-08tlb: Don't separate the TLB classes into an instruction TLB and a data TLBGabe Black
2009-02-27Processes: Make getting and setting system call arguments part of a process o...Gabe Black
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2009-02-25CPU: Get rid of translate... functions from various interface classes.Gabe Black
2008-11-04get rid of all instances of readTid() and getThreadNum(). Unify and eliminateLisa Hsu
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
2008-10-20O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo...Ali Saidi
2008-10-12Get rid of old RegContext code.Gabe Black
2008-10-11CPU: Eliminate the simPalCheck funciton.Gabe Black
2008-10-11CPU: Eliminate the hwrei function.Gabe Black
2008-09-10style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...Ali Saidi
2008-08-11params: Convert the CPU objects to use the auto generated param structs.Nathan Binkert
2008-07-01Remove delVirtPort() and make getVirtPort() only return cached version.Ali Saidi
2008-02-26TLB: Make a TLB base class and put a virtual demapPage function in it.Gabe Black
2007-08-26Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.Gabe Black
2007-03-07*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscRegAli Saidi
2007-02-12some forgotten commitsAli Saidi
2006-12-12Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(In...Steve Reinhardt
2006-11-07Put kernel_stats back into arch.Gabe Black
2006-11-07Moved the switched version of kernel_stats.hh back to kern, and moved the bas...Gabe Black