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path: root/src/cpu/checker
AgeCommit message (Expand)Author
2019-12-11cpu: Fix coding style (byteEnable->byte_enable)Giacomo Travaglini
2019-12-11cpu: Add byteEnable assertions to readMem and initateMemReadGiacomo Travaglini
2019-12-10arch,cpu,sim: Push syscall number determination up to processes.Gabe Black
2019-11-07cpu: Fix a bug in getCurrentInstCount in the checker CPU.Gabe Black
2019-11-02arch,cpu: Move endianness conversion of inst bytes into the ISA.Gabe Black
2019-10-25cpu: Get rid of the nextInstEventCount method.Gabe Black
2019-10-25cpu: Get rid of the serviceInstCountEvents method.Gabe Black
2019-10-25cpu: Switch off of the CPU's comInstEventQueue.Gabe Black
2019-10-25cpu,sim: Delegate PCEvent scheduling from Systems to ThreadContexts.Gabe Black
2019-10-25cpu: Make the ThreadContext a PCEventScope.Gabe Black
2019-10-25cpu: Pass the address to check into the PCEventQueue service method.Gabe Black
2019-09-23cpu, mem: Changing AtomicOpFunctor* for unique_ptr<AtomicOpFunctor>Jordi Vaquero
2019-08-28cpu: Make get(Data|Inst)Port return a Port and not a MasterPort.Gabe Black
2019-05-30arch, base, cpu, gpu, sim: Merge getMemProxy and getVirtProxy.Gabe Black
2019-05-30cpu, sim: Return PortProxy &s from all the proxy accessors.Gabe Black
2019-05-11cpu,mem: Add support for partial loads/stores and wide mem. accessesGiacomo Gabrielli
2019-05-11cpu: Add a memory access predicateGiacomo Gabrielli
2019-04-30cpu: alpha: Delete all occurrances of the simPalCheck function.Gabe Black
2019-04-30cpu: Remove hwrei from the generic interfaces.Gabe Black
2019-04-30arch: cpu: Track kernel stats using the base ISA agnostic type.Gabe Black
2019-04-29cpu: Get rid of the (read|set)RegOtherThread methods.Gabe Black
2019-04-22cpu: Eliminate the ProxyThreadContext class.Gabe Black
2019-02-19cpu: Add ISA* getter in Thread interfaceGiacomo Gabrielli
2019-02-08cpu: support atomic memory request type with AtomicOpFunctorTuan Ta
2019-02-05misc: added missing override specifierAndrea Mondelli
2019-02-01cpu, arch: Replace the CCReg type with RegVal.Gabe Black
2019-01-31arch: cpu: Rename *FloatRegBits* to *FloatReg*.Gabe Black
2019-01-30arch,cpu: Add vector predicate registersGiacomo Gabrielli
2019-01-22arch: cpu: Stop passing around misc registers by reference.Gabe Black
2019-01-16cpu: dev: sim: gpu-compute: Banish some ISA specific register types.Gabe Black
2018-12-20arch, cpu: Remove float type accessors.Gabe Black
2018-11-28cpu,arch-arm: Initialise data membersRekai Gonzalez-Alberquilla
2018-11-16cpu: Fix the usage of const DynInstPtrRekai Gonzalez-Alberquilla
2018-06-11misc: Using smart pointers for memory RequestsGiacomo Travaglini
2018-06-11misc: Substitute pointer to Request with aliased RequestPtrGiacomo Travaglini
2018-04-27sim,cpu,mem,arch: Introduced MasterInfo data structureGiacomo Travaglini
2018-01-09cpu, power: Get rid of the remnants of the EA computation insts.Gabe Black
2017-12-22arch,cpu: "virtualize" the TLB interface.Gabe Black
2017-12-05cpu: Add support for CMOs in the cpu modelsNikos Nikoleris
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2017-07-05cpu: Result refactoringRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-07-05arch, cpu: Architectural Register structural indexingNathanael Premillieu
2017-02-27syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess s...Brandon Potter
2015-07-20syscall_emul: [patch 13/22] add system call retry capabilityBrandon Potter
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2016-08-15cpu, arch: fix the type used for the request flagsNikos Nikoleris
2016-04-07mem: Remove threadId from memory request classMitch Hayenga
2016-04-06Revert power patch sets with unexpected interactionsAndreas Sandberg
2016-04-05mem: Remove threadId from memory request classMitch Hayenga