gem5 - gem5

Age	Commit message (Expand)	Author
2015-07-28	revert 5af8f40d8f2c	Nilay Vaish
2015-07-26	cpu: implements vector registers	Nilay Vaish
2014-11-06	x86 isa: This patch attempts an implementation at mwait.	Marc Orr
2014-10-16	arch: Use shared_ptr for all Faults	Andreas Hansson
2014-09-03	arch, cpu: Factor out the ExecContext into a proper base class	Andreas Sandberg
2011-11-01	SE/FS: Expose the same methods on the CPUs in SE and FS modes.	Gabe Black
2011-07-02	ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.	Gabe Black
2011-07-02	ExecContext: Get rid of the now unused read/write templated functions.	Gabe Black
2010-11-08	ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.	Ali Saidi
2010-08-13	CPU: Add readBytes and writeBytes functions to the exec contexts.	Gabe Black
2010-02-12	BaseDynInst: Make the TLB translation timing instead of atomic.	Timothy M. Jones
2009-07-08	Registers: Get rid of the float register width parameter.	Gabe Black
2007-03-07	MiscReg->MiscRegNoEffect, MiscRegWithEffect->MiscReg	Ali Saidi
2006-12-12	Rename the StaticInst-based (read\|set)(Int\|Float)Reg methods to (read\|set)(In...	Steve Reinhardt
2006-11-01	Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...	Gabe Black
2006-10-31	Move IntrFlag into the MiscRegFile and get rid of specialized accessor functi...	Gabe Black
2006-06-16	Add in exec_context.hh, which is a file for documentation purposes only. It ...	Kevin Lim
2006-06-06	Change ExecContext to ThreadContext. This is being renamed to differentiate ...	Kevin Lim
2006-06-02	Merge ktlim@zizzer:/bk/newmem	Kevin Lim
2006-05-31	Updated Authors from bk prs info	Ali Saidi
2006-05-30	Merge ktlim@zizzer:/bk/m5	Kevin Lim
2006-05-22	New directory structure:	Steve Reinhardt