gem5 - gem5

Age	Commit message (Collapse)	Author
2015-04-20	cpu: Remove the InOrderCPU from the tree	Andreas Hansson
	This patch takes the final step in removing the InOrderCPU from the tree. Rest in peace. The MinorCPU is now used to model an in-order microarchitecture, and long term the MinorCPU will eventually be renamed InOrderCPU.
2012-03-19	gcc: Clean-up of non-C++0x compliant code, first steps	Andreas Hansson
	This patch cleans up a number of minor issues aiming to get closer to compliance with the C++0x standard as interpreted by gcc and clang (compile with std=c++0x and -pedantic-errors). In particular, the patch cleans up enums where the last item was succeded by a comma, namespaces closed by a curcly brace followed by a semi-colon, and the use of the GNU-extension typeof (replaced by templated functions). It does not address variable-length arrays, zero-size arrays, anonymous structs, range expressions in switch statements, and the use of long long. The generated CPU code also has a large number of issues that remain to be fixed, mainly related to overflows in implicit constant conversion (due to shifts).
2011-04-15	includes: sort all includes	Nathan Binkert

2011-02-18	inorder: update default thread size(=1)	Korey Sewell
	a lot of structures get allocated based off that MaxThreads parameter so this is an effort to not abuse it
2011-02-12	inorder: clean up the old way of inst. scheduling	Korey Sewell
	remove remnants of old way of instruction scheduling which dynamically allocated a new resource schedule for every instruction
2011-02-12	inorder: cache instruction schedules	Korey Sewell
	first step in a optimization to not dynamically allocate an instruction schedule for every instruction but rather used cached schedules
2011-02-04	inorder: stage width as a python parameter	Korey Sewell
	allow the user to specify how many instructions a pipeline stage can process on any given cycle (stageWidth...i.e.bandwidth) by setting the parameter through the python interface rather than compile the code after changing the *.cc file. (we always had the parameter there, but still used the static 'ThePipeline::StageWidth' instead) - Since StageWidth is now dynamically defined, change the interstage communication structure to use a vector and get rid of array and array handling index (toNextStageIndex) since we can just make calls to the list for the same information
2010-06-25	inorder: resource scheduling backend	Korey Sewell
	replace priority queue with vector of lists(1 list per stage) and place inside a class so that we have more control of when an instruction uses a particular schedule entry ... also, this is the 1st step toward making the InOrderCPU fully parameterizable. See the wiki for details on this process
2010-06-24	inorder: cleanup virtual functions	Korey Sewell
	remove the annotation 'virtual' from function declaration that isnt being derived from
2010-01-31	inorder: implement split loads	Korey Sewell

2010-01-31	inorder: dont allow early loads	Korey Sewell
	- loads were happening on same cycle as the address was generated which is slightly unrealistic. Instead, force address generation to be on separate cycle from load initiation - also, mark the stages in a more traditional way (F-D-X-M-W)
2009-06-04	types: clean up types, especially signed vs unsigned	Nathan Binkert

2009-05-12	inorder-tlb-cunit: merge the TLB as implicit to any memory access	Korey Sewell
	TLBUnit no longer used and we also get rid of memAccSize and memAccFlags functions added to ISA and StaticInst since TLB is not a separate resource to acquire. Instead, TLB access is done before any read/write to memory and the result is checked before it's sent out to memory. * * *
2009-03-04	Remove unused functions/comments cluttering up the code.	Korey Sewell

2009-02-10	InOrder: Import new inorder CPU model from MIPS.	Korey Sewell
	This model currently only works in MIPS_SE mode, so it will take some effort to clean it up and make it generally useful. Hopefully people are willing to help make that happen!