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path: root/src/cpu/inorder/resource.cc
AgeCommit message (Expand)Author
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2011-04-15includes: sort all includesNathan Binkert
2011-02-18inorder: add names and slot #s to res. dprintsKorey Sewell
2011-02-18inorder: don't overuse getLatency()Korey Sewell
2011-02-18inorder: cleanup in destructorsKorey Sewell
2011-02-18inorder: remove events for zero-cycle resourcesKorey Sewell
2011-02-18inorder: update pipeline interface for handling finished resource reqsKorey Sewell
2011-02-18inorder: remove request map, use request vectorKorey Sewell
2011-02-18inorder: add valid bit for resource requestsKorey Sewell
2011-02-18inorder: remove reqRemoveListKorey Sewell
2011-02-18inorder: initialize res. req. vectors based on resource bandwidthKorey Sewell
2011-02-12inorder: utilize cached skeds in pipelineKorey Sewell
2011-02-04inorder: fault handlingKorey Sewell
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
2011-01-07inorder: replace schedEvent() code with reschedule().Steve Reinhardt
2011-01-07inorder: get rid of references to mainEventQueue.Steve Reinhardt
2010-06-28inorder: remove another debug statKorey Sewell
2010-06-26inorder: remove debugging statKorey Sewell
2010-06-24inorder: enforce 78-character ruleKorey Sewell
2010-06-23inorder-stats: add instruction type statsKorey Sewell
2010-01-31inorder: inst count mgmtKorey Sewell
2010-01-31inorder: implement split loadsKorey Sewell
2010-01-31inorder: object cleanup in destructorsKorey Sewell
2010-01-31inorder-stats: add prereq to basic statKorey Sewell
2010-01-31inorder: squash on memory stallKorey Sewell
2010-01-31inorder: init internal debug cpu countersKorey Sewell
2009-05-26types: add a type for thread IDs and try to use it everywhereNathan Binkert
2009-05-12inorder-resources: delete eventsKorey Sewell
2009-05-12inorder-tlb: squash insts in TLB correctlyKorey Sewell
2009-05-12inorder-fetch: update model to use predecoderKorey Sewell
2009-02-10InOrder: Import new inorder CPU model from MIPS.Korey Sewell