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path: root/src/cpu/inorder/resource_pool.hh
AgeCommit message (Collapse)Author
2010-06-24inorder: cleanup virtual functionsKorey Sewell
remove the annotation 'virtual' from function declaration that isnt being derived from
2010-01-31inorder: implement split loadsKorey Sewell
2010-01-31inorder: object cleanup in destructorsKorey Sewell
2010-01-31inorder: user per-thread dummy insts/reqsKorey Sewell
2010-01-31inorder: add updatePC event to resPoolKorey Sewell
this will be used for when a thread comes back from a cache miss, it needs to update the PCs because the inst might of been a branch or delayslot in which the next PC isnt always a straight addition
2010-01-31inorder: suspend in respoolKorey Sewell
give resources their own specific activity to do for a "suspend" event instead of defaulting to deactivating the thread for a suspend thread event. This really matters for the fetch sequence unit which wants to remove the thread from fetching while other units want to ignore a thread suspension. If you deactivate a thread in a resource then you may lose some of the allotted bandwidth that the thread is taking up...
2010-01-31inorder: squash on memory stallKorey Sewell
add code to recognize memory stalls in resources and the pipeline as well as squash a thread if there is a stall and we are in the switch on cache miss model
2009-05-26types: add a type for thread IDs and try to use it everywhereNathan Binkert
2009-05-12inorder-resources: delete eventsKorey Sewell
make sure unrecognized events in the resource pool are deleted and also delete resource events in destructor
2009-05-12inorder-alpha-port: initial inorder support of ALPHAKorey Sewell
Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions * * * Remove namespace from header file. Causes compiler issues that are hard to find * * * Separate the TLB from the CPU and allow it to live in the TLBUnit resource. Give CPU accessor functions for access and also bind at construction time * * * Expose memory access size and flags through instruction object (temporarily memAccSize and memFlags to get TLB stuff working.)
2009-02-10InOrder: Import new inorder CPU model from MIPS.Korey Sewell
This model currently only works in MIPS_SE mode, so it will take some effort to clean it up and make it generally useful. Hopefully people are willing to help make that happen!