Age | Commit message (Collapse) | Author | |
---|---|---|---|
2010-08-13 | CPU: Add readBytes and writeBytes functions to the exec contexts. | Gabe Black | |
2010-06-24 | inorder: cleanup virtual functions | Korey Sewell | |
remove the annotation 'virtual' from function declaration that isnt being derived from | |||
2010-06-24 | inorder: enforce 78-character rule | Korey Sewell | |
2010-01-31 | inorder: inst count mgmt | Korey Sewell | |
2010-01-31 | inorder: implement split stores | Korey Sewell | |
2010-01-31 | inorder: implement split loads | Korey Sewell | |
2010-01-31 | inorder: object cleanup in destructors | Korey Sewell | |
2010-01-31 | inorder: recvRetry bug fix | Korey Sewell | |
- on certain retry requests you can get an assertion failure - fix by allowing the request to literally "Retry" itself if it wasnt successful before, and then block any requests through cache port while waiting for the cache to be made available for access | |||
2010-01-31 | inorder: mem. mgmt. update | Korey Sewell | |
update address List and address Map to take into account multiple threads | |||
2010-01-31 | inorder: squash on memory stall | Korey Sewell | |
add code to recognize memory stalls in resources and the pipeline as well as squash a thread if there is a stall and we are in the switch on cache miss model | |||
2009-09-23 | arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh | Nathan Binkert | |
2009-05-26 | types: add a type for thread IDs and try to use it everywhere | Nathan Binkert | |
2009-05-12 | inorder-tlb-cunit: merge the TLB as implicit to any memory access | Korey Sewell | |
TLBUnit no longer used and we also get rid of memAccSize and memAccFlags functions added to ISA and StaticInst since TLB is not a separate resource to acquire. Instead, TLB access is done before any read/write to memory and the result is checked before it's sent out to memory. * * * | |||
2009-05-12 | inorder-stc: update interface to handle store conditionals | Korey Sewell | |
2009-05-12 | inorder-fetch: update model to use predecoder | Korey Sewell | |
2009-05-12 | inorder-mem: clean up allocation/deletion of requests/packets | Korey Sewell | |
* * * | |||
2009-05-12 | inorder-mem: skeleton support for prefetch/writehints | Korey Sewell | |
2009-02-10 | Configs: Add support for the InOrder CPU model | Korey Sewell | |
2009-02-10 | InOrder: Import new inorder CPU model from MIPS. | Korey Sewell | |
This model currently only works in MIPS_SE mode, so it will take some effort to clean it up and make it generally useful. Hopefully people are willing to help make that happen! |