gem5 - gem5

Age	Commit message (Collapse)	Author
2009-09-17	inorder-mdu: multiplier latency fix	Korey Sewell
	mdu was workign incorrectly for 4+ latency due to incorrectly assuming multiply was finished the next stage
2009-07-08	Registers: Get rid of the float register width parameter.	Gabe Black

2009-06-04	move: put predictor includes and cc files into the same place	Nathan Binkert
	--HG-- rename : src/cpu/2bit_local_pred.cc => src/cpu/pred/2bit_local.cc rename : src/cpu/o3/2bit_local_pred.hh => src/cpu/pred/2bit_local.hh rename : src/cpu/btb.cc => src/cpu/pred/btb.cc rename : src/cpu/o3/btb.hh => src/cpu/pred/btb.hh rename : src/cpu/ras.cc => src/cpu/pred/ras.cc rename : src/cpu/o3/ras.hh => src/cpu/pred/ras.hh rename : src/cpu/tournament_pred.cc => src/cpu/pred/tournament.cc rename : src/cpu/o3/tournament_pred.hh => src/cpu/pred/tournament.hh
2009-05-26	types: add a type for thread IDs and try to use it everywhere	Nathan Binkert

2009-05-12	inorder-tlb-cunit: merge the TLB as implicit to any memory access	Korey Sewell
	TLBUnit no longer used and we also get rid of memAccSize and memAccFlags functions added to ISA and StaticInst since TLB is not a separate resource to acquire. Instead, TLB access is done before any read/write to memory and the result is checked before it's sent out to memory. * * *
2009-05-12	inorder-tlb: squash insts in TLB correctly	Korey Sewell
	TLB had a bug where if it was stalled and waiting , it would not squash all instructions older than squashed instruction correctly * * *
2009-05-12	inorder-faults: ignore unalign translation faults for prefetches	Korey Sewell

2009-05-12	inorder-stc: update interface to handle store conditionals	Korey Sewell

2009-05-12	inorder-float: Fix storage of FP results	Korey Sewell
	inorder was incorrectly storing FP values and confusing the integer/fp storage view of floating point operations. A big issue was knowing trying to infer when were doing single or double precision access because this lets you know the size of value to store (32-64 bits). This isnt exactly straightforward since alpha uses all 64-bit regs while mips/sparc uses a dual-reg view. by getting this value from the actual floating point register file, the model can figure out what it needs to store
2009-05-12	inorder-fetch: update model to use predecoder	Korey Sewell

2009-05-12	inorder-mem: clean up allocation/deletion of requests/packets	Korey Sewell
	* * *
2009-05-12	inorder-mem: skeleton support for prefetch/writehints	Korey Sewell

2009-05-12	inorder-unified-tlb: use unified TLB instead of old TLB model	Korey Sewell

2009-05-12	inorder-miscregs: Fix indexing for misc. reg operands and update ↵	Korey Sewell
	result-types for better tracing of these types of values
2009-05-12	inorder-bpred: edits to handle non-delay-slot ISAs	Korey Sewell
	Changes so that InOrder can work for a non-delay-slot ISA like Alpha. Typically, changes have to do with handling misspeculated branches at different points in pipeline
2009-05-12	inorder-alpha-port: initial inorder support of ALPHA	Korey Sewell
	Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions * * * Remove namespace from header file. Causes compiler issues that are hard to find * * * Separate the TLB from the CPU and allow it to live in the TLBUnit resource. Give CPU accessor functions for access and also bind at construction time * * * Expose memory access size and flags through instruction object (temporarily memAccSize and memFlags to get TLB stuff working.)
2009-04-19	Mem: Change isLlsc to isLLSC.	Gabe Black

2009-04-19	Memory: Rename LOCKED for load locked store conditional to LLSC.	Gabe Black

2009-04-08	tlb: Don't separate the TLB classes into an instruction TLB and a data TLB	Gabe Black

2009-03-05	stats: Fix all stats usages to deal with template fixes	Nathan Binkert

2009-03-05	Get rid of 'using namespace' declarations in headers.	Steve Reinhardt

2009-03-04	InOrderCPU: Clean up Constructors to initialize variables correctly (i.e. in ↵	Korey Sewell
	a way for the compiler to play nice)
2009-03-04	Give each resource in InOrder it's own TraceFlag instead of just standard ↵	Korey Sewell
	'Resource' flag
2009-03-04	Remove unused functions/comments cluttering up the code.	Korey Sewell

2009-03-04	InOrder didnt have all it's params set to a default value, which is now ↵	Korey Sewell
	required for M5 objects; Also, a # of values need to be reset to 0 (or the appropriate value) before we assume they are OK for use.
2009-02-25	ISA: Replace the translate functions in the TLBs with translateAtomic.	Gabe Black

2009-02-25	CPU: Get rid of translate... functions from various interface classes.	Gabe Black

2009-02-10	Configs: Add support for the InOrder CPU model	Korey Sewell

2009-02-10	InOrder: Import new inorder CPU model from MIPS.	Korey Sewell
	This model currently only works in MIPS_SE mode, so it will take some effort to clean it up and make it generally useful. Hopefully people are willing to help make that happen!