gem5 - gem5

Age	Commit message (Expand)	Author
2014-05-09	cpu, arm: Allow the specification of a socket field	Akash Bagdia
2014-03-07	cpu: Make CPU and ThreadContext getters const	Andreas Hansson
2014-01-24	arch, cpu: Add support for flattening misc register indexes.	Ali Saidi
2013-10-15	cpu: add a condition-code register class	Yasuko Eckert
2013-01-07	cpu: Unify SimpleCPU and O3 CPU serialization code	Andreas Sandberg
2013-01-07	cpu: Implement a flat register interface in thread contexts	Andreas Sandberg
2013-01-07	arch: Make the ISA class inherit from SimObject	Andreas Sandberg
2012-08-28	Clock: Add a Cycles wrapper class and use where applicable	Andreas Hansson
2012-05-26	CPU: Merge the predecoder and decoder.	Gabe Black
2012-05-25	Decode: Make the Decoder class defined per ISA.	Gabe Black
2012-04-06	MEM: Enable multiple distributed generalized memories	Andreas Hansson
2012-03-09	CheckerCPU: Add function stubs to non-ARM ISA source to compile with CheckerCPU	Geoffrey Blake
2012-02-24	MEM: Make port proxies use references rather than pointers	Andreas Hansson
2012-01-30	Merge with main repository.	Gabe Black
2012-01-30	MEM: Clean-up of Functional/Virtual/TranslatingPort remnants	Andreas Hansson
2012-01-28	Merge with the main repo.	Gabe Black
2012-01-17	MEM: Add port proxies instead of non-structural ports	Andreas Hansson
2011-11-18	SE/FS: Get rid of FULL_SYSTEM in the CPU directory.	Gabe Black
2011-10-31	SE/FS: Make the functions available from the TC consistent between SE and FS.	Gabe Black
2011-10-30	SE/FS: Make getProcessPtr available in both modes, and get rid of FULL_SYSTEMs.	Gabe Black
2011-10-16	SE/FS: Include getMemPort in FS.	Gabe Black
2011-10-16	SE/FS: Build/expose vport in SE mode.	Gabe Black
2011-10-16	CPU: Make physPort and getPhysPort available in SE mode.	Gabe Black
2011-09-09	Decode: Pull instruction decoding out of the StaticInst class into its own.	Gabe Black
2011-06-19	inorder: make InOrder CPU FS compilable/visible	Korey Sewell
2011-06-19	inorder: use flattenIdx for reg indexing	Korey Sewell
2011-04-15	includes: sort all includes	Nathan Binkert
2010-10-31	ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.	Gabe Black
2010-09-13	CPU: Get rid of the now unnecessary getInst/setInst family of functions.	Gabe Black
2010-06-24	inorder: cleanup virtual functions	Korey Sewell
2010-06-24	inorder: enforce 78-character rule	Korey Sewell
2010-01-31	inorder: set thread status'	Korey Sewell
2009-09-23	arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh	Nathan Binkert
2009-09-15	inorder-alpha-fs: edit inorder model to compile FS mode	Korey Sewell
2009-07-08	Registers: Get rid of the float register width parameter.	Gabe Black
2009-07-08	Registers: Add an ISA object which replaces the MiscRegFile.	Gabe Black
2009-05-26	types: add a type for thread IDs and try to use it everywhere	Nathan Binkert
2009-05-12	inorder-alpha-port: initial inorder support of ALPHA	Korey Sewell
2009-04-15	Get rid of the Unallocated thread context state.	Steve Reinhardt
2009-04-08	tlb: Don't separate the TLB classes into an instruction TLB and a data TLB	Gabe Black
2009-03-04	InOrderCPU: Clean up Constructors to initialize variables correctly (i.e. in ...	Korey Sewell
2009-03-04	Remove unused functions/comments cluttering up the code.	Korey Sewell
2009-02-27	Processes: Make getting and setting system call arguments part of a process o...	Gabe Black
2009-02-20	Remove unnecessary building of FreeList/RenameMap in InOrder. Clean-up commen...	Korey Sewell
2009-02-10	InOrder: Import new inorder CPU model from MIPS.	Korey Sewell