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Age
Commit message (
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Author
2015-01-25
sim: Clean up InstRecord
Ali Saidi
2015-01-25
cpu: Remove all notion that we know when the cpu is misspeculating.
Ali Saidi
2014-12-02
mem: Add const getters for write packet data
Andreas Hansson
2014-11-06
x86 isa: This patch attempts an implementation at mwait.
Marc Orr
2014-10-16
arch: Use shared_ptr for all Faults
Andreas Hansson
2014-09-20
cpu: Remove unused deallocateContext calls
Mitch Hayenga
2014-09-20
alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate
Mitch Hayenga
2014-09-19
arch: Pass faults by const reference where possible
Andreas Hansson
2014-05-13
mem: Refactor assignment of Packet types
Curtis Dunham
2014-09-03
arch, cpu: Factor out the ExecContext into a proper base class
Andreas Sandberg
2014-05-31
style: eliminate equality tests with true and false
Steve Reinhardt
2014-05-09
cpu, arm: Allow the specification of a socket field
Akash Bagdia
2014-03-07
cpu: Make CPU and ThreadContext getters const
Andreas Hansson
2014-03-01
cpu: Enable fast-forwarding for MIPS InOrderCPU and O3CPU
Christopher Torng
2014-01-24
arch, cpu: Add support for flattening misc register indexes.
Ali Saidi
2014-01-24
cpu: Add CPU support for generatig wake up events when LLSC adresses are snoo...
Ali Saidi
2013-10-15
cpu: add a condition-code register class
Yasuko Eckert
2013-10-15
cpu: rename *_DepTag constants to *_Reg_Base
Steve Reinhardt
2013-10-15
cpu/inorder: merge register class enums
Steve Reinhardt
2013-10-15
cpu: clean up architectural register classification
Steve Reinhardt
2013-09-04
cpu: Move the branch predictor out of the BaseCPU
Andreas Hansson
2013-07-18
mem: Set the cache line size on a system level
Andreas Hansson
2013-04-22
sim: separate nextCycle() and clockEdge() in clockedObjects
Dam Sunwoo
2013-03-26
cpu: Remove CpuPort and use MasterPort in the CPU classes
Andreas Hansson
2013-03-20
cpu: Avoid including inorder TLBUnit to avoid gcc LTO bug
Andreas Hansson
2013-02-15
sim: Add a system-global option to bypass caches
Andreas Sandberg
2013-02-15
cpu: Refactor memory system checks
Andreas Sandberg
2013-02-15
cpu: Add CPU metadata om the Python classes
Andreas Sandberg
2013-01-24
branch predictor: move out of o3 and inorder cpus
Nilay Vaish ext:(%2C%20Timothy%20Jones%20%3Ctimothy.jones%40cl.cam.ac.uk%3E)
2013-01-07
cpu: Fix broken thread context handover
Andreas Sandberg
2013-01-07
cpu: Rename defer_registration->switched_out
Andreas Sandberg
2013-01-07
cpu: Remove unused params.hh header file in inorder CPU
Andreas Sandberg
2013-01-07
cpu: Unify SimpleCPU and O3 CPU serialization code
Andreas Sandberg
2013-01-07
cpu: Implement a flat register interface in thread contexts
Andreas Sandberg
2013-01-07
cpu: Check that the memory system is in the correct mode
Andreas Sandberg
2013-01-07
arch: Make the ISA class inherit from SimObject
Andreas Sandberg
2013-01-07
cpu: rename the misleading inSyscall to noSquashFromTC
Ali Saidi
2013-01-04
Decoder: Remove the thread context get/set from the decoder.
Gabe Black
2012-12-06
TournamentBP: Fix some bugs with table sizes and counters
Erik Tomusk
2012-12-06
inorder cpu: add missing DPRINTF argument
Malek Musleh
2012-11-02
sim: Include object header files in SWIG interfaces
Andreas Sandberg
2012-09-07
Param: Transition to Cycles for relevant parameters
Andreas Hansson
2012-08-28
Clock: Add a Cycles wrapper class and use where applicable
Andreas Hansson
2012-08-28
Clock: Rework clocks to avoid tick-to-cycle transformations
Andreas Hansson
2012-08-21
CPU: Remove overloaded function_trace_start parameter
Andreas Hansson
2012-08-06
process: add progName() virtual function
Steve Reinhardt
2012-07-09
Port: Align port names in C++ and Python
Andreas Hansson
2012-06-05
cpu: Don't init simple and inorder CPUs if they are defered.
Anthony Gutierrez
2012-06-05
sim: Remove FastAlloc
Ali Saidi
2012-05-26
CPU: Merge the predecoder and decoder.
Gabe Black
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