| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-01-25 | cpu: Remove all notion that we know when the cpu is misspeculating. | Ali Saidi |
| 2012-11-02 | sim: Include object header files in SWIG interfaces | Andreas Sandberg |
| 2011-04-15 | trace: reimplement the DTRACE function so it doesn't use a vector | Nathan Binkert |
| 2011-01-03 | Make commenting on close namespace brackets consistent. | Steve Reinhardt |
| 2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
| 2009-05-17 | includes: sort includes again | Nathan Binkert |
| 2009-05-17 | types: Move stuff for global types into src/base/types.hh | Nathan Binkert |
| 2009-01-06 | Tracing: Make tracing aware of macro and micro ops. | Gabe Black |
| 2007-08-30 | params: Deprecate old-style constructors; update most SimObject constructors. | Miles Kaufmann |
| 2007-07-28 | Turn the instruction tracing code into pluggable sim objects. | Gabe Black |
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index : gem5 | |
| gem5 |
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