| Age | Commit message (Expand) | Author |
|---|
| 2019-05-14 | Revert "cpu: fix how a thread starts up in MinorCPU" | Giacomo Travaglini |
| 2019-05-14 | Revert "cpu: stop scheduling suspended threads in MinorCPU" | Giacomo Travaglini |
| 2019-05-14 | Revert "cpu: fix branching when thread is suspended in MinorCPU" | Giacomo Travaglini |
| 2019-05-11 | cpu,mem: Add support for partial loads/stores and wide mem. accesses | Giacomo Gabrielli |
| 2019-03-28 | cpu: Added a probe to notify the address of retired instructions | Javier Bueno |
| 2019-02-08 | cpu: support atomic memory request type with AtomicOpFunctor | Tuan Ta |
| 2019-02-08 | cpu: fix how branching is handled when a thread is suspended in MinorCPU | Tuan Ta |
| 2019-02-08 | cpu: stop scheduling suspended threads in all stages of MinorCPU | Tuan Ta |
| 2019-02-06 | cpu: fix how a thread starts up in MinorCPU | Tuan Ta |
| 2018-02-05 | cpu: MinorCPU handling IsSquashAfter flag | Giacomo Travaglini |
| 2016-11-09 | style: [patch 1/22] use /r/3648/ to reorganize includes | Brandon Potter |
| 2016-07-21 | cpu: Fix Minor SMT WFI/drain interaction issues | Mitch Hayenga |
| 2016-07-21 | cpu: Add SMT support to MinorCPU | Mitch Hayenga |
| 2016-04-05 | cpu: Add instruction opclass histogram to minor | Mitch Hayenga |
| 2015-09-30 | isa,cpu: Add support for FS SMT Interrupts | Mitch Hayenga |
| 2015-05-26 | cpu: Fix a bug in counting issued instructions in MinorCPU | Andrew Bardsley |
| 2015-05-05 | cpu: Work around gcc 4.9 issues with Num_OpClasses | Andreas Hansson |
| 2015-04-03 | cpu: fix system total instructions accounting | Nikos Nikoleris |
| 2014-12-02 | cpu: Fix memoryIssueLimit checking in Minor | Andrew Bardsley |
| 2014-12-02 | mem: Add const getters for write packet data | Andreas Hansson |
| 2014-11-06 | cpu: Minor Draining Bug | Andrew Lukefahr |
| 2014-10-16 | cpu: Probe points for basic PMU stats | Andreas Sandberg |
| 2014-09-12 | minor: Fix typo in DPRINTF for Minor branch prediction | Andreas Hansson |
| 2014-07-23 | cpu: `Minor' in-order CPU model | Andrew Bardsley |
