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path: root/src/cpu/minor
AgeCommit message (Expand)Author
2016-06-06pwr: Low-power idle power state for idle CPUsDavid Guillen Fandos
2016-05-27cpu: fix lastStopped unserialisationIlias Vougioukas
2016-04-07mem: Remove threadId from memory request classMitch Hayenga
2016-04-06Revert power patch sets with unexpected interactionsAndreas Sandberg
2016-04-05mem: Remove threadId from memory request classMitch Hayenga
2014-12-09power: Low-power idle power state for idle CPUsAkash Bagdia
2016-04-05cpu: Add instruction opclass histogram to minorMitch Hayenga
2015-07-19cpu: Fix LLSC atomic CPU wakeupKrishnendra Nathella
2016-02-15misc: Add missing overrides to appease clangAndreas Hansson
2016-02-10mem: Deduce if cache should forward snoopsAndreas Hansson
2016-02-06style: fix missing spaces in control statementsSteve Reinhardt
2016-01-17cpu. arch: add initiateMemRead() to ExecContext interfaceSteve Reinhardt
2015-10-12misc: Add explicit overrides and fix other clang >= 3.5 issuesAndreas Hansson
2015-10-12misc: Remove redundant compiler-specific definesAndreas Hansson
2015-09-30cpu,isa,mem: Add per-thread wakeup logicMitch Hayenga
2015-09-30isa,cpu: Add support for FS SMT InterruptsMitch Hayenga
2015-09-30cpu: Add per-thread monitorsMitch Hayenga
2015-08-21mem: Reflect that packet address and size are always validAndreas Hansson
2015-08-07base: Declare a type for context IDsAndreas Sandberg
2015-07-31cpu: Update debug message from Fetch1 isDrained() in MinorAndreas Sandberg
2015-07-31cpu: Fix Minor drain issues when switched outAndreas Sandberg
2015-07-30cpu: Only activate thread 0 in Minor if the CPU is activeAndreas Sandberg
2015-07-30cpu: Fix drain issues in the Minor CPUAndreas Sandberg
2015-07-28revert 5af8f40d8f2cNilay Vaish
2015-07-26cpu: implements vector registersNilay Vaish
2015-07-07sim: Refactor and simplify the drain APIAndreas Sandberg
2015-07-07sim: Make the drain state a global typed enumAndreas Sandberg
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-05-26cpu: Fix a bug in counting issued instructions in MinorCPUAndrew Bardsley
2015-05-05mem, cpu: Add a separate flag for strictly ordered memoryAndreas Sandberg
2015-05-05cpu: Work around gcc 4.9 issues with Num_OpClassesAndreas Hansson
2015-04-13cpu: re-organizes the branch predictor structure.Dibakar Gope
2015-04-03cpu: fix system total instructions accountingNikos Nikoleris
2015-02-11mem: restructure Packet cmd initialization a bit moreSteve Reinhardt
2015-03-02mem: Split port retry for all different packet classesAndreas Hansson
2015-02-16arch: Make readMiscRegNoEffect const throughoutAndreas Hansson
2015-01-25sim: Clean up InstRecordAli Saidi
2015-01-20cpu: Fix retry bug in MinorCPU LSQAndreas Hansson
2015-01-03minor: fixed LSQ MasterPortIDAndrew Lukefahr
2014-12-02cpu: Fix retries on barrier/store in Minor's store bufferAndrew Bardsley
2014-12-02cpu: Fix memoryIssueLimit checking in MinorAndrew Bardsley
2014-12-02mem: Assume all dynamic packet data is array allocatedAndreas Hansson
2014-12-02mem: Add const getters for write packet dataAndreas Hansson
2014-11-14arm: Fixes based on UBSan and static analysisAndreas Hansson
2014-11-06x86 isa: This patch attempts an implementation at mwait.Marc Orr
2014-11-06cpu: Minor Draining BugAndrew Lukefahr
2014-10-29cpu: Fix barrier push to store buffer when full bug in MinorAndrew Bardsley
2014-10-16cpu: Probe points for basic PMU statsAndreas Sandberg
2014-09-27arch: Use const StaticInstPtr references where possibleAndreas Hansson
2014-09-20alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivateMitch Hayenga