summaryrefslogtreecommitdiff
path: root/src/cpu/minor
AgeCommit message (Expand)Author
2020-01-03cpu: Fix issue with MinorCPU predicated-false mem. accessesGiacomo Gabrielli
2020-01-03cpu: Disable MinorCPU value forwarding with write strobesGabor Dozsa
2019-12-11cpu: Fix coding style (byteEnable->byte_enable)Giacomo Travaglini
2019-12-11cpu: Add byteEnable assertions to readMem and initateMemReadGiacomo Travaglini
2019-12-10arch,cpu,sim: Push syscall number determination up to processes.Gabe Black
2019-12-03cpu,sim-se: move error checks in syscall methodsBrandon Potter
2019-11-02arch,cpu: Move endianness conversion of inst bytes into the ISA.Gabe Black
2019-10-25cpu: Get rid of the serviceInstCountEvents method.Gabe Black
2019-10-25cpu: Access inst events through ThreadContext instead of the CPU.Gabe Black
2019-10-25cpu: Make accesses to comInstEventQueue indirect through methods.Gabe Black
2019-10-25cpu,sim: Delegate PCEvent scheduling from Systems to ThreadContexts.Gabe Black
2019-10-25cpu: Make the ThreadContext a PCEventScope.Gabe Black
2019-10-25cpu: Pass the address to check into the PCEventQueue service method.Gabe Black
2019-10-15sim,cpu: Get rid of the unused instEventQueue.Gabe Black
2019-09-23cpu, mem: Changing AtomicOpFunctor* for unique_ptr<AtomicOpFunctor>Jordi Vaquero
2019-08-28cpu: Make get(Data|Inst)Port return a Port and not a MasterPort.Gabe Black
2019-07-27cpu: Add first-/non-faulting load support to Minor and O3Gabor Dozsa
2019-05-14Revert "cpu: fix how a thread starts up in MinorCPU"Giacomo Travaglini
2019-05-14Revert "cpu: stop scheduling suspended threads in MinorCPU"Giacomo Travaglini
2019-05-14Revert "cpu: fix branching when thread is suspended in MinorCPU"Giacomo Travaglini
2019-05-11cpu,mem: Add support for partial loads/stores and wide mem. accessesGiacomo Gabrielli
2019-05-11cpu: Add a memory access predicateGiacomo Gabrielli
2019-04-30cpu: alpha: Delete all occurrances of the simPalCheck function.Gabe Black
2019-04-30cpu: Remove hwrei from the generic interfaces.Gabe Black
2019-04-29cpu: Get rid of the (read|set)RegOtherThread methods.Gabe Black
2019-03-28cpu: Added a probe to notify the address of retired instructionsJavier Bueno
2019-03-14arch-arm,cpu: Add initial support for Arm SVEGiacomo Gabrielli
2019-02-22python: Make iterator handling Python 3 compatibleAndreas Sandberg
2019-02-12python: Don't assume SimObjects live in the global namespaceAndreas Sandberg
2019-02-08cpu: support atomic memory request type with AtomicOpFunctorTuan Ta
2019-02-08cpu: fix how branching is handled when a thread is suspended in MinorCPUTuan Ta
2019-02-08cpu: stop scheduling suspended threads in all stages of MinorCPUTuan Ta
2019-02-06cpu: fix how a thread starts up in MinorCPUTuan Ta
2019-02-05misc: added missing override specifierAndrea Mondelli
2019-02-01cpu, arch: Replace the CCReg type with RegVal.Gabe Black
2019-01-31arch: cpu: Rename *FloatRegBits* to *FloatReg*.Gabe Black
2019-01-30arch,cpu: Add vector predicate registersGiacomo Gabrielli
2019-01-25cpu: Fix VecElemClass bugs in cpu modelsGiacomo Travaglini
2019-01-25cpu: Add VecElem entries in MinorCPU ScoreboardGiacomo Travaglini
2019-01-22arch: cpu: Stop passing around misc registers by reference.Gabe Black
2019-01-16cpu: dev: sim: gpu-compute: Banish some ISA specific register types.Gabe Black
2018-12-20arch, cpu: Remove float type accessors.Gabe Black
2018-12-04base, sim: Add missing destructorsNikos Nikoleris
2018-11-27arch, base, cpu, gpu, mem: Replace assert(0 or false with panic.Gabe Black
2018-11-16cpu: Fix the usage of const DynInstPtrRekai Gonzalez-Alberquilla
2018-10-09cpu: Fix MinorCPU executing Crypto InstructionsGiacomo Travaglini
2018-06-14cpu-minor: Remove redundant thread startup callAndreas Sandberg
2018-06-11misc: Using smart pointers for memory RequestsGiacomo Travaglini
2018-06-11misc: Substitute pointer to Request with aliased RequestPtrGiacomo Travaglini
2018-03-06scons: Switch from the print statement to the print function.Gabe Black