gem5 - gem5

Age	Commit message (Collapse)	Author
2009-07-27	ARM: Make native trace print out what instruction caused an error.	Gabe Black

2009-07-19	CPU: Separate out native trace into ISA (in)dependent code and SimObjects.	Gabe Black
	--HG-- rename : src/cpu/nativetrace.cc => src/arch/sparc/nativetrace.cc rename : src/cpu/nativetrace.hh => src/arch/sparc/nativetrace.hh rename : src/cpu/NativeTrace.py => src/arch/x86/X86NativeTrace.py
2009-07-08	Registers: Add a registers.hh file as an ISA switched header.	Gabe Black
	This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
2008-08-03	sockets: Add a function to disable all listening sockets.	Nathan Binkert
	When invoking several copies of m5 on the same machine at the same time, there can be a race for TCP ports for the terminal connections or remote gdb. Expose a function to disable those ports, and have the regression scripts disable them. There are some SimObjects that have no other function than to be used with ports (NativeTrace and EtherTap), so they will panic if the ports are disabled.
2007-09-04	X86/StateTrace: Make m5 and statetrace track mmx and xmm registers, and ↵	Gabe Black
	actually compare xmm. --HG-- extra : convert_revision : 02c6641200edb133c9bc11f1fdf3c1a0b1c87e77
2007-08-31	X86: Get x86 to compile again after the simobject constructor change.	Gabe Black
	--HG-- extra : convert_revision : 17a3e16e849bee88892223f0c993b19c15daa554
2007-08-01	X86: Reorganize the native tracing code.	Gabe Black
	Ignore different values or rcx and r11 after a syscall until either the local or remote value changes. Also change the codes organization somewhat. --HG-- extra : convert_revision : 2c1f69d4e55b443e68bfc7b43e8387b02cf0b6b5
2007-07-29	X86: Fix register ordering.	Gabe Black
	The correct order is unintuitively rax, rcx, rdx, rbx, etc, not rax, rbx, rcx, rdx. --HG-- extra : convert_revision : 3abe6a723a6e30becfe34f8da707ea2ff5d4df77
2007-07-28	Turn the instruction tracing code into pluggable sim objects.	Gabe Black
	These need to be refined a little still and given parameters. --HG-- extra : convert_revision : 9a8f5a7bd9dacbebbbd2c235cd890c49a81040d7