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path: root/src/cpu/o3/FuncUnitConfig.py
AgeCommit message (Expand)Author
2015-04-29cpu: o3: replace issueLatency with bool pipelinedNilay Vaish
2015-04-29cpu: o3: single cycle default div microop latency on x86Nilay Vaish
2010-11-15CPU/ARM: Add SIMD op classes to CPU models and ARM ISA.Giacomo Gabrielli
2007-05-27Move SimObject python files alongside the C++ and fixNathan Binkert