gem5 - gem5

Age	Commit message (Expand)	Author
2012-06-29	O3: Track if the RAS has been pushed or not to pop the RAS if neccessary.	Nathanael Premillieu
2012-02-13	BPred: Fix RAS to handle predicated call/return instructions.	Mrinmoy Ghosh
2012-02-13	BP: Fix several Branch Predictor issues.	Mrinmoy Ghosh
2011-04-15	trace: reimplement the DTRACE function so it doesn't use a vector	Nathan Binkert
2011-04-15	includes: sort all includes	Nathan Binkert
2010-10-31	ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.	Gabe Black
2009-09-23	arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh	Nathan Binkert
2009-05-26	types: add a type for thread IDs and try to use it everywhere	Nathan Binkert
2009-04-18	o3-delay-slot-bpred: fix decode stage handling of uncdtl. branches.\n decode ...	Korey Sewell
2009-03-07	stats: fix duplicate statistics names.	Nathan Binkert
2008-08-11	params: Convert the CPU objects to use the auto generated param structs.	Nathan Binkert
2006-12-28	Make sure the value of PC is actually updated now that the instruction target...	Gabe Black
2006-12-16	Don't have "predict" set the predicted target of the instruction. Do that exp...	Gabe Black
2006-08-31	add ISA_HAS_DELAY_SLOT directive instead of "#if THE_ISA == ALPHA_ISA" throug...	Korey Sewell
2006-08-15	Cleaned up include files and got rid of many using directives in header files.	Gabe Black
2006-07-23	This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds,...	Korey Sewell
2006-06-04	Merge ktlim@zamp:/z/ktlim2/clean/m5-o3	Kevin Lim
2006-06-02	Merge ktlim@zizzer:/bk/newmem	Kevin Lim
2006-05-31	Updated Authors from bk prs info	Ali Saidi
2006-05-30	Merge ktlim@zizzer:/bk/m5	Kevin Lim
2006-05-22	New directory structure:	Steve Reinhardt