gem5 - gem5

Age	Commit message (Expand)	Author
2019-03-20	invisispec-1.0 source	Iru Cai
2018-11-16	cpu: Fix the usage of const DynInstPtr	Rekai Gonzalez-Alberquilla
2017-07-12	cpu: Refactor some Event subclasses to lambdas	Sean Wilson
2017-07-05	arch: ISA parser additions of vector registers	Rekai Gonzalez-Alberquilla
2015-07-20	syscall_emul: [patch 13/22] add system call retry capability	Brandon Potter
2015-12-07	probe: Add probe in Fetch, IEW, Rename and Commit	Radhika Jagtap
2015-03-09	cpu: o3: commit: mark pipeline delay variable as consts	Nilay Vaish
2015-03-09	cpu: o3: remove unused stat variables.	Nilay Vaish
2015-03-09	cpu: o3: remove member variable squashCounter	Nilay Vaish
2014-09-03	cpu: Fix o3 drain bug	Mitch Hayenga
2014-09-03	cpu: Fix SMT scheduling issue with the O3 cpu	Mitch Hayenga
2014-09-03	cpu: Fix o3 front-end pipeline interlock behavior	Mitch Hayenga
2014-05-09	cpu: add more instruction mix statistics	Curtis Dunham
2014-01-24	base: add support for probe points and common probes	Matt Horsnell
2013-02-15	cpu: Fix a livelock in the o3 cpu.	Ali Saidi
2013-01-07	cpu: Rewrite O3 draining to avoid stopping in microcode	Andreas Sandberg
2013-01-07	cpu: Fix broken squashAfter implementation in O3 CPU	Andreas Sandberg
2013-01-07	cpu: Initialize the O3 pipeline from startup()	Andreas Sandberg
2012-09-12	stats: remove duplicate instruction stats from the commit stage	Anthony Gutierrez
2012-09-07	Param: Transition to Cycles for relevant parameters	Andreas Hansson
2012-08-28	Clock: Add a Cycles wrapper class and use where applicable	Andreas Hansson
2012-08-28	Clock: Rework clocks to avoid tick-to-cycle transformations	Andreas Hansson
2012-02-12	cpu: add separate stats for insts/ops both globally and per cpu model	Anthony Gutierrez
2012-02-10	O3 CPU: Strengthen condition for handling interrupts	Nilay Vaish
2012-01-31	Merge with head, hopefully the last time for this batch.	Gabe Black
2012-01-31	clang: Enable compiling gem5 using clang 2.9 and 3.0	Koan-Sin Tan
2011-11-18	SE/FS: Get rid of FULL_SYSTEM in the CPU directory.	Gabe Black
2011-04-15	includes: fix up code after sorting	Nathan Binkert
2011-04-15	includes: sort all includes	Nathan Binkert
2011-03-17	O3: Cleanup the commitInfo comm struct.	Ali Saidi
2011-02-06	mcpat: Adds McPAT performance counters	Joel Hestness
2011-01-18	O3: Keep around the last committed instruction and use for squashing.	Ali Saidi
2011-01-18	O3: Fixes fetch deadlock when the interrupt clears before CPU handles it.	Min Kyu Jeong
2011-01-03	Move sched_list.hh and timebuf.hh from src/base to src/cpu.	Steve Reinhardt
2010-12-07	O3: Support squashing all state after special instruction	Ali Saidi
2010-10-31	ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.	Gabe Black
2009-05-26	types: add a type for thread IDs and try to use it everywhere	Nathan Binkert
2009-03-05	stats: Fix all stats usages to deal with template fixes	Nathan Binkert
2008-08-11	params: Convert the CPU objects to use the auto generated param structs.	Nathan Binkert
2008-02-06	Make the Event::description() a const function	Stephen Hines
2007-04-14	Add support for microcode and pull out the special branch delay slot handling...	Gabe Black
2007-04-04	Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU f...	Kevin Lim
2007-03-23	Updates for commit.	Kevin Lim
2006-11-13	More interrupt reworking.	Kevin Lim
2006-08-15	Cleaned up include files and got rid of many using directives in header files.	Gabe Black
2006-07-26	MIPS ISA runs 'hello world' in O3CPU ...	Korey Sewell
2006-07-23	This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds,...	Korey Sewell
2006-07-10	Some minor cleanups.	Kevin Lim
2006-07-06	Fix the O3CPU to support the multi-pass method for checking if the system has...	Kevin Lim
2006-07-06	Support for draining, and the new method of switching out. Now switching out...	Kevin Lim