| Age | Commit message (Expand) | Author |
|---|
| 2012-05-01 | MEM: Separate requests and responses for timing accesses | Andreas Hansson |
| 2012-04-14 | MEM: Remove the Broadcast destination from the packet | Andreas Hansson |
| 2012-04-06 | MEM: Enable multiple distributed generalized memories | Andreas Hansson |
| 2012-03-11 | O3: Add fatal when fetchWidth > Impl::MaxWidth. | Brian Grayson |
| 2012-03-09 | CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable | Geoffrey Blake |
| 2012-02-24 | CPU: Round-two unifying instr/data CPU ports across models | Andreas Hansson |
| 2012-02-12 | mem: Add a master ID to each request object. | Ali Saidi |
| 2012-02-10 | O3 CPU: Improve handling of delayed commit flag | Nilay Vaish |
| 2012-02-10 | O3 CPU: Strengthen condition for handling interrupts | Nilay Vaish |
| 2012-02-10 | O3 CPU: Provide the squashing instruction | Nilay Vaish |
| 2012-02-10 | O3 Fetch: Check if PC is pointing to Microcode ROM | Nilay Vaish |
| 2012-01-31 | Merge with head, hopefully the last time for this batch. | Gabe Black |
| 2012-01-31 | CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5 | Geoffrey Blake |
| 2012-01-28 | Merge with the main repo. | Gabe Black |
| 2012-01-17 | CPU: Moving towards a more general port across CPU models | Andreas Hansson |
| 2012-01-07 | Another merge with the main repository. | Gabe Black |
| 2011-12-13 | gcc: fix unused variable warnings from GCC 4.6.1 | Nathan Binkert |
| 2011-11-18 | SE/FS: Get rid of FULL_SYSTEM in the CPU directory. | Gabe Black |
| 2011-09-09 | Decode: Pull instruction decoding out of the StaticInst class into its own. | Gabe Black |
| 2011-08-14 | O3: When squashing, restore the macroop that should be used for fetching. | Gabe Black |
| 2011-08-14 | O3: Add a pointer to the macroop for a microop in the dyninst. | Gabe Black |
| 2011-08-13 | O3: At the end of an instruction, force fetchAddr to something sensible. | Gabe Black |
| 2011-08-09 | O3: Stop using the current macroop no matter why you're leaving it. | Gabe Black |
| 2011-07-30 | O3: Fix corner case squashing into the microcode ROM. | Gabe Black |
| 2011-07-15 | O3: Create a pipeline activity viewer for the O3 CPU model. | Giacomo Gabrielli |
| 2011-07-10 | O3: Fix up pipelining icache accesses in fetch stage to function properly | Geoffrey Blake |
| 2011-07-10 | O3: Make sure fetch doesn't go off into the weeds during speculation. | Ali Saidi |
| 2011-06-10 | o3: missing newlines on some dprintfs | Korey Sewell |
| 2011-05-23 | O3: Fix issue with interrupts/faults occuring in the middle of a macro-op | Geoffrey Blake |
| 2011-04-15 | trace: reimplement the DTRACE function so it doesn't use a vector | Nathan Binkert |
| 2011-04-15 | includes: sort all includes | Nathan Binkert |
| 2011-04-04 | ARM: Cleanup implementation of ITSTATE and put important code in PCState. | Ali Saidi |
| 2011-03-17 | O3: Send instruction back to fetch on squash to seed predecoder correctly. | Ali Saidi |
| 2011-03-17 | O3: Cleanup the commitInfo comm struct. | Ali Saidi |
| 2011-03-17 | Mem: Fix issue with dirty block being lost when entire block transferred to n... | Ali Saidi |
| 2011-02-25 | O3CPU: Fix iqCount and lsqCount SMT fetch policies. | Timothy M. Jones |
| 2011-02-23 | O3: Fix bug when a squash occurs right before TLB miss returns. | Ali Saidi |
| 2011-02-13 | O3: Fetch from the microcode ROM when needed. | Gabe Black |
| 2011-02-11 | O3: Fix pipeline restart when a table walk completes in the fetch stage. | Giacomo Gabrielli |
| 2011-02-02 | O3: Fix a style bug in O3. | Gabe Black |
| 2011-01-18 | O3: Fix some variable length instruction issues with the O3 CPU and ARM ISA. | Matt Horsnell |
| 2011-01-18 | O3: Fix mispredicts from non control instructions. | Matt Horsnell |
| 2011-01-18 | O3: Support timing translations for O3 CPU fetch. | Ali Saidi |
| 2011-01-18 | O3: Fixes fetch deadlock when the interrupt clears before CPU handles it. | Min Kyu Jeong |
| 2011-01-07 | Replace curTick global variable with accessor functions. | Steve Reinhardt |
| 2010-11-15 | O3: Make O3 support variably lengthed instructions. | Gabe Black |
| 2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
| 2010-08-23 | O3: Skipping mem-order violation check for uncachable loads. | Min Kyu Jeong |
| 2010-08-23 | ARM: Improve printing of uop disassembly. | Min Kyu Jeong |
| 2009-09-26 | O3: Mark fetch stage as active if it faults. | Steve Reinhardt |
