gem5 - gem5

Age	Commit message (Expand)	Author
2015-07-20	cpu: Fixed a bug on where to fetch the next instruction from	David Hashe
2015-03-02	mem: Split port retry for all different packet classes	Andreas Hansson
2014-12-02	mem: Assume all dynamic packet data is array allocated	Andreas Hansson
2014-12-02	mem: Add const getters for write packet data	Andreas Hansson
2014-10-11	cpu: Fix o3 SMT IQCount bug	Andrew Lukefahr
2014-09-20	alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate	Mitch Hayenga
2014-09-19	arch: Pass faults by const reference where possible	Andreas Hansson
2014-09-09	cpu: Only iterate over possible threads on the o3 cpu	Mitch Hayenga
2014-09-03	cpu: Fix o3 quiesce fetch bug	Mitch Hayenga
2014-09-03	cpu: Fix SMT scheduling issue with the O3 cpu	Mitch Hayenga
2014-09-03	cpu: Add a fetch queue to the o3 cpu	Mitch Hayenga
2014-09-03	cpu: Fix o3 front-end pipeline interlock behavior	Mitch Hayenga
2014-06-30	cpu: implement a bi-mode branch predictor	Anthony Gutierrez
2014-05-31	style: eliminate equality tests with true and false	Steve Reinhardt
2014-01-24	mem: per-thread cache occupancy and per-block ages	Dam Sunwoo
2014-01-24	base: add support for probe points and common probes	Matt Horsnell
2014-01-24	mem: track per-request latencies and access depths in the cache hierarchy	Matt Horsnell
2013-11-15	cpu: allow the fetch buffer to be smaller than a cache line	Anthony Gutierrez
2013-10-17	cpu: add consistent guarding to *_impl.hh files.	Matt Horsnell
2013-08-19	cpu: Fix a bug in the O3 CPU introduced by the cache line patch	Andreas Hansson
2013-07-18	mem: Set the cache line size on a system level	Andreas Hansson
2013-04-22	cpu: fix a switching issue with the o3 cpu.	Ali Saidi
2013-03-04	cpu: fix a switching issue with the o3 cpu.	Ali Saidi
2013-02-15	o3: fix tick used for renaming and issue with range selection	Matt Horsnell
2013-01-24	branch predictor: move out of o3 and inorder cpus	Nilay Vaish ext:(%2C%20Timothy%20Jones%20%3Ctimothy.jones%40cl.cam.ac.uk%3E)
2013-01-07	cpu: Rewrite O3 draining to avoid stopping in microcode	Andreas Sandberg
2013-01-07	cpu: Initialize the O3 pipeline from startup()	Andreas Sandberg
2013-01-04	Decoder: Remove the thread context get/set from the decoder.	Gabe Black
2012-08-28	Clock: Add a Cycles wrapper class and use where applicable	Andreas Hansson
2012-08-28	Clock: Rework clocks to avoid tick-to-cycle transformations	Andreas Hansson
2012-08-22	Packet: Remove NACKs from packet and its use in endpoints	Andreas Hansson
2012-08-15	O3,ARM: fix some problems with drain/switchout functionality and add Drain DP...	Anthony Gutierrez
2012-06-05	ISA: Back-out NoopMachInst as a StaticInstPtr change.	Ali Saidi
2012-06-04	ISA: Turn the ExtMachInst NoopMachinst into the StaticInstPtr NoopStaticInst.	Gabe Black
2012-05-26	CPU: Merge the predecoder and decoder.	Gabe Black
2012-05-01	MEM: Separate requests and responses for timing accesses	Andreas Hansson
2012-04-14	MEM: Remove the Broadcast destination from the packet	Andreas Hansson
2012-04-06	MEM: Enable multiple distributed generalized memories	Andreas Hansson
2012-03-11	O3: Add fatal when fetchWidth > Impl::MaxWidth.	Brian Grayson
2012-03-09	CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable	Geoffrey Blake
2012-02-24	CPU: Round-two unifying instr/data CPU ports across models	Andreas Hansson
2012-02-12	mem: Add a master ID to each request object.	Ali Saidi
2012-02-10	O3 CPU: Improve handling of delayed commit flag	Nilay Vaish
2012-02-10	O3 CPU: Strengthen condition for handling interrupts	Nilay Vaish
2012-02-10	O3 CPU: Provide the squashing instruction	Nilay Vaish
2012-02-10	O3 Fetch: Check if PC is pointing to Microcode ROM	Nilay Vaish
2012-01-31	Merge with head, hopefully the last time for this batch.	Gabe Black
2012-01-31	CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5	Geoffrey Blake
2012-01-28	Merge with the main repo.	Gabe Black
2012-01-17	CPU: Moving towards a more general port across CPU models	Andreas Hansson