index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
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range
path:
root
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src
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cpu
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o3
/
iew.hh
Age
Commit message (
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)
Author
2019-02-08
cpu: fixed how O3 CPU executes an exit system call
Tuan Ta
2018-11-16
cpu: Fix the usage of const DynInstPtr
Rekai Gonzalez-Alberquilla
2015-12-07
probe: Add probe in Fetch, IEW, Rename and Commit
Radhika Jagtap
2015-11-16
o3: drop unused statistic wbPenalized and wbPenalizedRate
Nilay Vaish
2014-09-03
cpu: Fix cache blocked load behavior in o3 cpu
Mitch Hayenga
2014-09-03
cpu: Fix o3 front-end pipeline interlock behavior
Mitch Hayenga
2014-09-03
cpu: Change writeback modeling for outstanding instructions
Mitch Hayenga
2014-01-24
base: add support for probe points and common probes
Matt Horsnell
2013-01-19
O3 IEW: Make incrWb and decrWb clearer
Joel Hestness
2013-01-07
cpu: Rewrite O3 draining to avoid stopping in microcode
Andreas Sandberg
2013-01-07
cpu: Initialize the O3 pipeline from startup()
Andreas Sandberg
2012-09-07
Param: Transition to Cycles for relevant parameters
Andreas Hansson
2012-01-31
Merge with head, hopefully the last time for this batch.
Gabe Black
2012-01-31
clang: Enable compiling gem5 using clang 2.9 and 3.0
Koan-Sin Tan
2012-01-28
Merge with the main repo.
Gabe Black
2012-01-17
CPU: Moving towards a more general port across CPU models
Andreas Hansson
2011-11-18
SE/FS: Get rid of includes of config/full_system.hh.
Gabe Black
2011-05-23
O3: Fix issue w/wbOutstading being decremented multiple times on blocked cache.
Geoffrey Blake
2011-04-15
trace: reimplement the DTRACE function so it doesn't use a vector
Nathan Binkert
2011-04-15
includes: fix up code after sorting
Nathan Binkert
2011-04-15
includes: sort all includes
Nathan Binkert
2011-01-03
Move sched_list.hh and timebuf.hh from src/base to src/cpu.
Steve Reinhardt
2010-12-07
O3: Support SWAP and predicated loads/store in ARM.
Min Kyu Jeong
2010-08-23
O3: Handle loads when the destination is the PC.
Min Kyu Jeong
2009-05-26
types: add a type for thread IDs and try to use it everywhere
Nathan Binkert
2009-03-05
stats: Fix all stats usages to deal with template fixes
Nathan Binkert
2008-09-26
O3CPU: Fix thread writeback logic.
Kevin Lim
2008-08-11
params: Convert the CPU objects to use the auto generated param structs.
Nathan Binkert
2007-11-06
O3: Remove unneeded variable.
Gabe Black
2007-04-13
Remove most of the special handling for delay slots since they have to be squ...
Gabe Black
2007-04-04
Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU f...
Kevin Lim
2006-09-30
Merge ktlim@zamp:./local/clean/o3-merge/m5
Kevin Lim
2006-07-23
This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds,...
Korey Sewell
2006-07-19
Some minor compiling fixes.
Kevin Lim
2006-07-07
Support Ron's changes for hooking up ports.
Kevin Lim
2006-07-06
Fix the O3CPU to support the multi-pass method for checking if the system has...
Kevin Lim
2006-07-06
Support for draining, and the new method of switching out. Now switching out...
Kevin Lim
2006-07-05
Add some different parameters. The main change is that the writeback count i...
Kevin Lim
2006-06-16
Two updates that got combined into one ChangeSet accidentally. They're both ...
Kevin Lim
2006-06-13
Minor updates for stats.
Kevin Lim
2006-06-12
Clean up/shift some code around.
Kevin Lim
2006-06-09
Removing of old code and adding in new comments.
Kevin Lim
2006-06-04
Merge ktlim@zamp:/z/ktlim2/clean/m5-o3
Kevin Lim
2006-06-02
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-06-02
Fixes to get compiling to work. This is mainly fixing up some includes; chan...
Kevin Lim
2006-05-31
Updated Authors from bk prs info
Ali Saidi
2006-05-30
Merge ktlim@zizzer:/bk/m5
Kevin Lim
2006-05-22
New directory structure:
Steve Reinhardt