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path: root/src/cpu/o3/iew_impl.hh
AgeCommit message (Expand)Author
2015-09-15cpu, o3: consider split requests for LSQ checksnoop operationsHongil Yoon
2015-05-05mem, cpu: Add a separate flag for strictly ordered memoryAndreas Sandberg
2015-03-09cpu: o3: Remove unused code in iew, add assert instead.Nilay Vaish
2014-10-29cpu: Add drain check functionality to IEWMitch Hayenga
2014-09-03cpu: Fix cache blocked load behavior in o3 cpuMitch Hayenga
2014-09-03cpu: Fix o3 front-end pipeline interlock behaviorMitch Hayenga
2014-09-03cpu: Change writeback modeling for outstanding instructionsMitch Hayenga
2014-06-21o3: make dispatch LSQ full check more selectiveBinh Pham
2014-06-21o3: split load & store queue full cases in renameBinh Pham
2014-05-31style: eliminate equality tests with true and falseSteve Reinhardt
2014-04-23cpu: Add O3 CPU width checksDam Sunwoo
2014-04-19o3: Fix occupancy checks for SMTFaissal Sleiman
2014-01-24base: add support for probe points and common probesMatt Horsnell
2013-10-17cpu: add consistent guarding to *_impl.hh files.Matt Horsnell
2013-10-17cpu: Change IEW DPRINTF to use IEW debug flagFaissal Sleiman
2013-06-27cpu: Consider instructions waiting for FU completion in drainingAndreas Hansson
2013-02-15o3: fix tick used for renaming and issue with range selectionMatt Horsnell
2013-01-07cpu: Rewrite O3 draining to avoid stopping in microcodeAndreas Sandberg
2013-01-07cpu: Initialize the O3 pipeline from startup()Andreas Sandberg
2012-06-05O3: Clean up the O3 structures and try to pack them a bit better.Ali Saidi
2012-03-09O3/Ozone: Eliminate dead code counting software prefetch instsGeoffrey Blake
2012-03-09CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectableGeoffrey Blake
2012-02-24CPU: Round-two unifying instr/data CPU ports across modelsAndreas Hansson
2012-01-31clang: Enable compiling gem5 using clang 2.9 and 3.0Koan-Sin Tan
2012-01-31CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5Geoffrey Blake
2012-01-10DPRINTF: Improve some dprintf messages.Nilay Vaish
2011-08-19O3: Squash the violator and younger instructions instead not all insts.Giacomo Gabrielli
2011-07-15O3: Create a pipeline activity viewer for the O3 CPU model.Giacomo Gabrielli
2011-05-23O3: Fix issue w/wbOutstading being decremented multiple times on blocked cache.Geoffrey Blake
2011-05-13O3: Fix an issue with a load & branch instruction and mem dep squashingGeoffrey Blake
2011-04-19stats: rename stats so they can be used as python expressionsNathan Binkert
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2011-04-15includes: fix up code after sortingNathan Binkert
2011-04-15includes: sort all includesNathan Binkert
2011-03-17O3: Cleanup the commitInfo comm struct.Ali Saidi
2011-02-23O3: When a prefetch causes a fault, don't record it in the instAli Saidi
2011-02-11O3: Enhance data address translation by supporting hardware page table walkers.Giacomo Gabrielli
2011-02-06mcpat: Adds McPAT performance countersJoel Hestness
2011-01-18O3: Don't test misprediction on load instructions until executed.Matt Horsnell
2011-01-18O3: Fix corner cases where multiple squashes/fetch redirects overwrite timebuf.Matt Horsnell
2011-01-18O3: Fix mispredicts from non control instructions.Matt Horsnell
2011-01-18O3: Fixes the way prefetches are handled inside the iew unit.Matt Horsnell
2011-01-18ARM: Add support for moving predicated false dest operands from sources.Ali Saidi
2011-01-18O3: Fixes fetch deadlock when the interrupt clears before CPU handles it.Min Kyu Jeong
2011-01-03Move sched_list.hh and timebuf.hh from src/base to src/cpu.Steve Reinhardt
2010-12-07O3: Support SWAP and predicated loads/store in ARM.Min Kyu Jeong
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-08-23O3: Skipping mem-order violation check for uncachable loads.Min Kyu Jeong
2010-08-23ARM: mark msr/mrs instructions as SerializeBefore/AfterMin Kyu Jeong
2010-08-23O3: Handle loads when the destination is the PC.Min Kyu Jeong