| Age | Commit message (Expand) | Author |
|---|
| 2011-08-19 | O3: Squash the violator and younger instructions instead not all insts. | Giacomo Gabrielli |
| 2011-07-15 | O3: Create a pipeline activity viewer for the O3 CPU model. | Giacomo Gabrielli |
| 2011-05-23 | O3: Fix issue w/wbOutstading being decremented multiple times on blocked cache. | Geoffrey Blake |
| 2011-05-13 | O3: Fix an issue with a load & branch instruction and mem dep squashing | Geoffrey Blake |
| 2011-04-19 | stats: rename stats so they can be used as python expressions | Nathan Binkert |
| 2011-04-15 | trace: reimplement the DTRACE function so it doesn't use a vector | Nathan Binkert |
| 2011-04-15 | includes: fix up code after sorting | Nathan Binkert |
| 2011-04-15 | includes: sort all includes | Nathan Binkert |
| 2011-03-17 | O3: Cleanup the commitInfo comm struct. | Ali Saidi |
| 2011-02-23 | O3: When a prefetch causes a fault, don't record it in the inst | Ali Saidi |
| 2011-02-11 | O3: Enhance data address translation by supporting hardware page table walkers. | Giacomo Gabrielli |
| 2011-02-06 | mcpat: Adds McPAT performance counters | Joel Hestness |
| 2011-01-18 | O3: Don't test misprediction on load instructions until executed. | Matt Horsnell |
| 2011-01-18 | O3: Fix corner cases where multiple squashes/fetch redirects overwrite timebuf. | Matt Horsnell |
| 2011-01-18 | O3: Fix mispredicts from non control instructions. | Matt Horsnell |
| 2011-01-18 | O3: Fixes the way prefetches are handled inside the iew unit. | Matt Horsnell |
| 2011-01-18 | ARM: Add support for moving predicated false dest operands from sources. | Ali Saidi |
| 2011-01-18 | O3: Fixes fetch deadlock when the interrupt clears before CPU handles it. | Min Kyu Jeong |
| 2011-01-03 | Move sched_list.hh and timebuf.hh from src/base to src/cpu. | Steve Reinhardt |
| 2010-12-07 | O3: Support SWAP and predicated loads/store in ARM. | Min Kyu Jeong |
| 2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
| 2010-08-23 | O3: Skipping mem-order violation check for uncachable loads. | Min Kyu Jeong |
| 2010-08-23 | ARM: mark msr/mrs instructions as SerializeBefore/After | Min Kyu Jeong |
| 2010-08-23 | O3: Handle loads when the destination is the PC. | Min Kyu Jeong |
| 2009-09-23 | arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh | Nathan Binkert |
| 2009-05-26 | types: add a type for thread IDs and try to use it everywhere | Nathan Binkert |
| 2009-04-18 | o3-delay-slot-bpred: fix decode stage handling of uncdtl. branches.\n decode ... | Korey Sewell |
| 2008-08-11 | params: Convert the CPU objects to use the auto generated param structs. | Nathan Binkert |
| 2007-11-06 | O3: Remove unneeded variable. | Gabe Black |
| 2007-04-14 | Add support for microcode and pull out the special branch delay slot handling... | Gabe Black |
| 2007-04-13 | Remove most of the special handling for delay slots since they have to be squ... | Gabe Black |
| 2007-04-04 | Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU f... | Kevin Lim |
| 2007-04-02 | Remove/comment out DPRINTFs that were causing a segfault. | Kevin Lim |
| 2007-03-23 | Handle status bits a little better, as well as non-speculative instructions. | Kevin Lim |
| 2007-01-03 | Merge zizzer:/bk/newmem | Gabe Black |
| 2006-12-28 | Fixes to get non-delay slot ISAs (Alpha) working again, and pulling some debu... | Gabe Black |
| 2006-12-26 | Remove some #if FULL_SYSTEMs so MP stuff works even in SE mode. | Kevin Lim |
| 2006-12-20 | don't use (*activeThreads).begin(), use activeThreads->blah(). | Nathan Binkert |
| 2006-12-18 | Fix a place where the wrong width parameter was used, and set the nextNPC cor... | Gabe Black |
| 2006-12-16 | Merge zizzer:/bk/newmem | Gabe Black |
| 2006-12-16 | Made branch delay slots get squashed, and passed back an NPC and NNPC to star... | Gabe Black |
| 2006-12-12 | Allow for multiple redirects to happen on a single cycle (only the one for th... | Kevin Lim |
| 2006-12-06 | Change how optional delay slot instructions are detected and squashed. | Gabe Black |
| 2006-10-08 | Updates to O3 CPU. It should now work in FS mode, although sampling still ha... | Kevin Lim |
| 2006-10-02 | Updates to fix merge issues and bring almost everything up to working speed. ... | Kevin Lim |
| 2006-09-30 | Merge ktlim@zamp:./local/clean/o3-merge/m5 | Kevin Lim |
| 2006-08-31 | add ISA_HAS_DELAY_SLOT directive instead of "#if THE_ISA == ALPHA_ISA" throug... | Korey Sewell |
| 2006-08-15 | Cleaned up include files and got rid of many using directives in header files. | Gabe Black |
| 2006-07-23 | This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds,... | Korey Sewell |
| 2006-07-10 | Add parameters for backwards and forwards sizes for time buffers. | Kevin Lim |
