index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
cpu
/
o3
/
iew_impl.hh
Age
Commit message (
Expand
)
Author
2014-04-19
o3: Fix occupancy checks for SMT
Faissal Sleiman
2014-01-24
base: add support for probe points and common probes
Matt Horsnell
2013-10-17
cpu: add consistent guarding to *_impl.hh files.
Matt Horsnell
2013-10-17
cpu: Change IEW DPRINTF to use IEW debug flag
Faissal Sleiman
2013-06-27
cpu: Consider instructions waiting for FU completion in draining
Andreas Hansson
2013-02-15
o3: fix tick used for renaming and issue with range selection
Matt Horsnell
2013-01-07
cpu: Rewrite O3 draining to avoid stopping in microcode
Andreas Sandberg
2013-01-07
cpu: Initialize the O3 pipeline from startup()
Andreas Sandberg
2012-06-05
O3: Clean up the O3 structures and try to pack them a bit better.
Ali Saidi
2012-03-09
O3/Ozone: Eliminate dead code counting software prefetch insts
Geoffrey Blake
2012-03-09
CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
Geoffrey Blake
2012-02-24
CPU: Round-two unifying instr/data CPU ports across models
Andreas Hansson
2012-01-31
clang: Enable compiling gem5 using clang 2.9 and 3.0
Koan-Sin Tan
2012-01-31
CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5
Geoffrey Blake
2012-01-10
DPRINTF: Improve some dprintf messages.
Nilay Vaish
2011-08-19
O3: Squash the violator and younger instructions instead not all insts.
Giacomo Gabrielli
2011-07-15
O3: Create a pipeline activity viewer for the O3 CPU model.
Giacomo Gabrielli
2011-05-23
O3: Fix issue w/wbOutstading being decremented multiple times on blocked cache.
Geoffrey Blake
2011-05-13
O3: Fix an issue with a load & branch instruction and mem dep squashing
Geoffrey Blake
2011-04-19
stats: rename stats so they can be used as python expressions
Nathan Binkert
2011-04-15
trace: reimplement the DTRACE function so it doesn't use a vector
Nathan Binkert
2011-04-15
includes: fix up code after sorting
Nathan Binkert
2011-04-15
includes: sort all includes
Nathan Binkert
2011-03-17
O3: Cleanup the commitInfo comm struct.
Ali Saidi
2011-02-23
O3: When a prefetch causes a fault, don't record it in the inst
Ali Saidi
2011-02-11
O3: Enhance data address translation by supporting hardware page table walkers.
Giacomo Gabrielli
2011-02-06
mcpat: Adds McPAT performance counters
Joel Hestness
2011-01-18
O3: Don't test misprediction on load instructions until executed.
Matt Horsnell
2011-01-18
O3: Fix corner cases where multiple squashes/fetch redirects overwrite timebuf.
Matt Horsnell
2011-01-18
O3: Fix mispredicts from non control instructions.
Matt Horsnell
2011-01-18
O3: Fixes the way prefetches are handled inside the iew unit.
Matt Horsnell
2011-01-18
ARM: Add support for moving predicated false dest operands from sources.
Ali Saidi
2011-01-18
O3: Fixes fetch deadlock when the interrupt clears before CPU handles it.
Min Kyu Jeong
2011-01-03
Move sched_list.hh and timebuf.hh from src/base to src/cpu.
Steve Reinhardt
2010-12-07
O3: Support SWAP and predicated loads/store in ARM.
Min Kyu Jeong
2010-10-31
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
Gabe Black
2010-08-23
O3: Skipping mem-order violation check for uncachable loads.
Min Kyu Jeong
2010-08-23
ARM: mark msr/mrs instructions as SerializeBefore/After
Min Kyu Jeong
2010-08-23
O3: Handle loads when the destination is the PC.
Min Kyu Jeong
2009-09-23
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
Nathan Binkert
2009-05-26
types: add a type for thread IDs and try to use it everywhere
Nathan Binkert
2009-04-18
o3-delay-slot-bpred: fix decode stage handling of uncdtl. branches.\n decode ...
Korey Sewell
2008-08-11
params: Convert the CPU objects to use the auto generated param structs.
Nathan Binkert
2007-11-06
O3: Remove unneeded variable.
Gabe Black
2007-04-14
Add support for microcode and pull out the special branch delay slot handling...
Gabe Black
2007-04-13
Remove most of the special handling for delay slots since they have to be squ...
Gabe Black
2007-04-04
Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU f...
Kevin Lim
2007-04-02
Remove/comment out DPRINTFs that were causing a segfault.
Kevin Lim
2007-03-23
Handle status bits a little better, as well as non-speculative instructions.
Kevin Lim
2007-01-03
Merge zizzer:/bk/newmem
Gabe Black
[next]