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path: root/src/cpu/o3/lsq.hh
AgeCommit message (Expand)Author
2010-08-13CPU: Add readBytes and writeBytes functions to the exec contexts.Gabe Black
2010-02-12O3PCU: Split loads and stores that cross cache line boundaries.Timothy M. Jones
2009-05-26types: add a type for thread IDs and try to use it everywhereNathan Binkert
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
2008-08-11params: Convert the CPU objects to use the auto generated param structs.Nathan Binkert
2008-06-28Backed out changeset 94a7bb476fca: caused memory leak.Steve Reinhardt
2008-06-21Generate more useful error messages for unconnected ports.Steve Reinhardt
2007-05-21Change getDeviceAddressRanges to use bool for snoop arg.Steve Reinhardt
2007-04-04Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU f...Kevin Lim
2007-03-09Two fixes:Kevin Lim
2006-12-15little fixes i noticed while searching for reason for address range issues (b...Lisa Hsu
2006-11-13Make CPU models signal to update the snoop rangesRon Dreslinski
2006-10-09Have cpus send snoop rangesRon Dreslinski
2006-07-13Move Dcache port creation from LSQUnit to LSQ in order to support Ron's recen...Kevin Lim
2006-07-07Support Ron's changes for hooking up ports.Kevin Lim
2006-06-16Two updates that got combined into one ChangeSet accidentally. They're both ...Kevin Lim
2006-06-13Minor updates for stats.Kevin Lim
2006-06-09Removing of old code and adding in new comments.Kevin Lim
2006-06-07Update copyright.Kevin Lim
2006-06-04Merge ktlim@zamp:/z/ktlim2/clean/m5-o3Kevin Lim
2006-06-02Fixes to get compiling to work. This is mainly fixing up some includes; chan...Kevin Lim