summaryrefslogtreecommitdiff
path: root/src/cpu/o3/lsq_impl.hh
AgeCommit message (Expand)Author
2018-06-11misc: Using smart pointers for memory RequestsGiacomo Travaglini
2016-04-07mem: Remove threadId from memory request classMitch Hayenga
2016-04-06Revert power patch sets with unexpected interactionsAndreas Sandberg
2016-04-05mem: Remove threadId from memory request classMitch Hayenga
2015-03-02mem: Split port retry for all different packet classesAndreas Hansson
2014-12-02cpu, o3: Ignored invalidate causing same-address load reorderingMarco Elver
2014-12-02cpu: Move packet deallocation to recvTimingResp in the O3 CPUStephan Diestelhorst
2014-09-03cpu: Fix cache blocked load behavior in o3 cpuMitch Hayenga
2014-06-21o3: split load & store queue full cases in renameBinh Pham
2013-10-17cpu: add consistent guarding to *_impl.hh files.Matt Horsnell
2013-09-11cpu: Dynamically instantiate O3 CPU LSQUnitsJoel Hestness
2013-01-07cpu: Rewrite O3 draining to avoid stopping in microcodeAndreas Sandberg
2013-01-07cpu: Fix O3 LSQ debug dumping constness and formattingAndreas Sandberg
2012-12-06o3 cpu: remove some unused buggy functions in the lsqNathanael Premillieu
2012-05-01MEM: Separate requests and responses for timing accessesAndreas Hansson
2012-04-14MEM: Separate snoops and normal memory requests/responsesAndreas Hansson
2012-02-24CPU: Round-two unifying instr/data CPU ports across modelsAndreas Hansson
2012-01-17CPU: Moving towards a more general port across CPU modelsAndreas Hansson
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
2011-09-13LSQ: Only trigger a memory violation with a load/load if the value changes.Ali Saidi
2011-06-10o3: missing newlines on some dprintfsKorey Sewell
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
2009-05-26types: add a type for thread IDs and try to use it everywhereNathan Binkert
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
2008-09-26O3CPU: Fix thread writeback logic.Kevin Lim
2008-08-11params: Convert the CPU objects to use the auto generated param structs.Nathan Binkert
2008-06-28Backed out changeset 94a7bb476fca: caused memory leak.Steve Reinhardt
2008-06-21Generate more useful error messages for unconnected ports.Steve Reinhardt
2007-08-26Merge with headGabe Black
2007-08-21o3: Fix for retry ID bug.Kevin Lim
2007-07-15Fix up a bunch of multilevel coherence issues.Steve Reinhardt
2007-04-04Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU f...Kevin Lim
2007-04-02Remove/comment out DPRINTFs that were causing a segfault.Kevin Lim
2007-03-09Two fixes:Kevin Lim
2006-12-21styleNathan Binkert
2006-12-20don't use (*activeThreads).begin(), use activeThreads->blah().Nathan Binkert
2006-11-13Make CPU models signal to update the snoop rangesRon Dreslinski
2006-11-13Change warn to DPRINTF.Kevin Lim
2006-10-19Small changes:Ron Dreslinski
2006-10-17Fixes for uni-coherence in timing mode for FS.Ron Dreslinski
2006-10-08Fixes for functional path.Ron Dreslinski
2006-10-02Updates to fix merge issues and bring almost everything up to working speed. ...Kevin Lim
2006-09-30Merge ktlim@zamp:./local/clean/o3-merge/m5Kevin Lim
2006-08-16Fixes for Kevins O3 model to work with the blocking caches.Ron Dreslinski
2006-08-15Cleaned up include files and got rid of many using directives in header files.Gabe Black
2006-07-13Move Dcache port creation from LSQUnit to LSQ in order to support Ron's recen...Kevin Lim
2006-07-06Support serializing and unserializing in the O3 CPU. Also a few small fixes ...Kevin Lim
2006-06-16Two updates that got combined into one ChangeSet accidentally. They're both ...Kevin Lim
2006-06-13Minor updates for stats.Kevin Lim