gem5 - gem5

Age	Commit message (Expand)	Author
2007-11-15	add thread id to misc. reg functions	Korey Sewell
2007-08-26	Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.	Gabe Black
2007-08-13	Move the "translate" member functions back into the base o3 class.	Gabe Black
2007-07-30	Fix problem with tracer not being initialized.	Gabe Black
2007-07-26	X86: Fix argument register indexing.	Gabe Black
2007-07-23	Major changes to how SimObjects are created and initialized. Almost all	Nathan Binkert
2007-06-28	o3cpu build for mips	Korey Sewell
2007-04-15	Add extra constructors to Alpha and MIPS	Gabe Black
2007-04-04	Updates for other ISA cpu_builders.	Kevin Lim
2007-03-07	MiscReg->MiscRegNoEffect, MiscRegWithEffect->MiscReg	Ali Saidi
2006-12-20	Fixes to get MIPS_SE to compile.	Gabe Black
2006-12-12	Merge zizzer:/bk/newmem/	Gabe Black
2006-12-12	Rename the StaticInst-based (read\|set)(Int\|Float)Reg methods to (read\|set)(In...	Steve Reinhardt
2006-12-06	Use the setSyscallReturn defined in arch rather than duplicating it here.	Gabe Black
2006-12-06	Get rid of some typedefs which were hardly used, and move some stuff back her...	Gabe Black
2006-11-14	Make cpu's capable of having a phase shift	Ron Dreslinski
2006-11-01	Merge zizzer.eecs.umich.edu:/bk/newmem/	Gabe Black
2006-11-01	Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...	Gabe Black
2006-10-31	Remove mem parameter. Now the translating port asks the CPU's dcache's peer ...	Kevin Lim
2006-10-20	Use PacketPtr everywhere	Nathan Binkert
2006-08-15	Cleaned up include files and got rid of many using directives in header files.	Gabe Black
2006-08-11	Pushed most of constants.hh back into isa_traits.hh and regfile.hh and create...	Gabe Black
2006-07-26	MIPS ISA runs 'hello world' in O3CPU ...	Korey Sewell
2006-07-23	This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds,...	Korey Sewell