gem5 - gem5

Age	Commit message (Expand)	Author
2019-05-30	cpu-o3: Add support for pinned writes	Giacomo Gabrielli
2019-04-30	arch: cpu: Track kernel stats using the base ISA agnostic type.	Gabe Black
2019-02-01	cpu, arch: Replace the CCReg type with RegVal.	Gabe Black
2019-01-31	arch: cpu: Rename FloatRegBits to FloatReg.	Gabe Black
2019-01-30	arch,cpu: Add vector predicate registers	Giacomo Gabrielli
2019-01-16	cpu: dev: sim: gpu-compute: Banish some ISA specific register types.	Gabe Black
2018-12-22	cpu: Stop using unions to store FP registers.	Gabe Black
2018-12-20	arch, cpu: Remove float type accessors.	Gabe Black
2017-07-05	cpu: Added interface for vector reg file	Rekai Gonzalez-Alberquilla
2017-07-05	cpu: Simplify the rename interface and use RegId	Rekai Gonzalez-Alberquilla
2017-07-05	cpu: Physical register structural + flat indexing	Nathanael Premillieu
2015-07-28	revert 5af8f40d8f2c	Nilay Vaish
2015-07-26	cpu: implements vector registers	Nilay Vaish
2013-10-15	cpu: add a condition-code register class	Yasuko Eckert
2013-10-15	cpu/o3: clean up rename map and free list	Steve Reinhardt
2013-10-15	cpu/o3: clean up physical register file	Steve Reinhardt
2012-07-09	Fix: Address a few benign memory leaks	Andreas Hansson
2011-11-18	SE/FS: Get rid of includes of config/full_system.hh.	Gabe Black
2011-11-18	SE/FS: Get rid of FULL_SYSTEM in the CPU directory.	Gabe Black
2011-04-15	trace: reimplement the DTRACE function so it doesn't use a vector	Nathan Binkert
2009-09-23	arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh	Nathan Binkert
2009-07-08	Registers: Add a registers.hh file as an ISA switched header.	Gabe Black
2009-07-08	Registers: Get rid of the float register width parameter.	Gabe Black
2009-07-08	Registers: Add an ISA object which replaces the MiscRegFile.	Gabe Black
2009-05-26	types: add a type for thread IDs and try to use it everywhere	Nathan Binkert
2008-09-10	style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...	Ali Saidi
2008-08-11	params: Convert the CPU objects to use the auto generated param structs.	Nathan Binkert
2007-04-22	Make the floating point zero register special handling only apply for ALPHA.	Gabe Black
2007-04-08	Take into account that the flattened integer register space is a different si...	Gabe Black
2007-04-04	Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU f...	Kevin Lim
2007-03-07	MiscReg->MiscRegNoEffect, MiscRegWithEffect->MiscReg	Ali Saidi
2006-11-07	Put kernel_stats back into arch.	Gabe Black
2006-11-07	Got rid of a stray blank line.	Gabe Black
2006-11-01	Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...	Gabe Black
2006-10-31	Move IntrFlag into the MiscRegFile and get rid of specialized accessor functi...	Gabe Black
2006-08-15	Cleaned up include files and got rid of many using directives in header files.	Gabe Black
2006-07-06	Various serialization changes to make it possible for the O3CPU to checkpoint.	Kevin Lim
2006-06-16	Two updates that got combined into one ChangeSet accidentally. They're both ...	Kevin Lim
2006-06-08	Get O3 CPU mostly working in full system, and fix an FP bug that showed up.	Kevin Lim
2006-06-07	Clear misc regs at startup.	Kevin Lim
2006-06-06	Change ExecContext to ThreadContext. This is being renamed to differentiate ...	Kevin Lim
2006-06-02	Merge ktlim@zizzer:/bk/newmem	Kevin Lim
2006-06-02	Fixes to get compiling to work. This is mainly fixing up some includes; chan...	Kevin Lim
2006-05-31	Updated Authors from bk prs info	Ali Saidi
2006-05-30	Merge ktlim@zizzer:/bk/m5	Kevin Lim
2006-05-22	New directory structure:	Steve Reinhardt