| Age | Commit message (Expand) | Author |
|---|
| 2019-05-30 | cpu-o3: Add support for pinned writes | Giacomo Gabrielli |
| 2019-04-03 | misc: Removed inconsistency in O3* debug msgs | Andrea Mondelli |
| 2019-02-08 | cpu: support atomic memory request type with AtomicOpFunctor | Tuan Ta |
| 2019-02-08 | cpu: fixed how O3 CPU executes an exit system call | Tuan Ta |
| 2019-01-30 | arch,cpu: Add vector predicate registers | Giacomo Gabrielli |
| 2019-01-25 | cpu, arch, arch-arm: Wire unused VecElem code in the O3 model | Giacomo Travaglini |
| 2019-01-25 | cpu: Fix VecElemClass bugs in cpu models | Giacomo Travaglini |
| 2018-11-28 | cpu,arch-arm: Initialise data members | Rekai Gonzalez-Alberquilla |
| 2018-11-16 | cpu: Fix the usage of const DynInstPtr | Rekai Gonzalez-Alberquilla |
| 2017-07-19 | cpu: Add missing rename of vector registers in the O3 CPU | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | cpu: Added interface for vector reg file | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | cpu: Simplify the rename interface and use RegId | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | cpu: Physical register structural + flat indexing | Nathanael Premillieu |
| 2017-07-05 | arch, cpu: Architectural Register structural indexing | Nathanael Premillieu |
| 2016-09-22 | cpu: Fix the O3 CPU Drain | Rekai Gonzalez-Alberquilla |
| 2016-02-06 | style: fix missing spaces in control statements | Steve Reinhardt |
| 2015-12-07 | probe: Add probe in Fetch, IEW, Rename and Commit | Radhika Jagtap |
| 2015-07-28 | revert 5af8f40d8f2c | Nilay Vaish |
| 2015-07-26 | cpu: implements vector registers | Nilay Vaish |
| 2015-07-26 | cpu: o3: slight correction to identation in rename_impl.hh | Nilay Vaish |
| 2015-03-02 | cpu: o3 register renaming request handling improved | Rekai |
| 2014-09-03 | cpu: Fix o3 front-end pipeline interlock behavior | Mitch Hayenga |
| 2014-06-21 | o3: split load & store queue full cases in rename | Binh Pham |
| 2014-04-23 | cpu: Add O3 CPU width checks | Dam Sunwoo |
| 2013-10-17 | cpu: add consistent guarding to *_impl.hh files. | Matt Horsnell |
| 2013-10-17 | cpu: Removing an unused variable in rename | Faissal Sleiman |
| 2013-10-15 | cpu: add a condition-code register class | Yasuko Eckert |
| 2013-10-15 | cpu/o3: clean up rename map and free list | Steve Reinhardt |
| 2013-10-15 | cpu: rename *_DepTag constants to *_Reg_Base | Steve Reinhardt |
| 2013-10-15 | cpu/o3: clean up scoreboard object | Steve Reinhardt |
| 2013-10-15 | cpu: clean up architectural register classification | Steve Reinhardt |
| 2013-02-15 | cpu: Fix rename mis-handling serializing instructions when resource constrained | Geoffrey Blake |
| 2013-02-15 | o3: fix tick used for renaming and issue with range selection | Matt Horsnell |
| 2013-01-07 | cpu: Rewrite O3 draining to avoid stopping in microcode | Andreas Sandberg |
| 2013-01-07 | cpu: Initialize the O3 pipeline from startup() | Andreas Sandberg |
| 2012-06-05 | O3: Clean up the O3 structures and try to pack them a bit better. | Ali Saidi |
| 2012-03-21 | O3: Fix sizing of decode to rename skid buffer. | Andrew Lukefahr |
| 2012-01-16 | Merge yet again with the main repository. | Gabe Black |
| 2012-01-09 | O3: Remove some asserts that no longer seem to be valid. | Ali Saidi |
| 2012-01-07 | Merge with main repository. | Gabe Black |
| 2011-11-18 | SE/FS: Get rid of includes of config/full_system.hh. | Gabe Black |
| 2011-10-31 | GCC: Get everything working with gcc 4.6.1. | Gabe Black |
| 2011-07-15 | O3: Create a pipeline activity viewer for the O3 CPU model. | Giacomo Gabrielli |
| 2011-04-19 | stats: rename stats so they can be used as python expressions | Nathan Binkert |
| 2011-04-15 | trace: reimplement the DTRACE function so it doesn't use a vector | Nathan Binkert |
| 2011-02-06 | mcpat: Adds McPAT performance counters | Joel Hestness |
| 2011-01-18 | O3: Don't try to scoreboard misc registers. | Ali Saidi |
| 2010-11-18 | O3: Fix fp destination register flattening, and index offset adjusting. | Gabe Black |
| 2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
| 2010-08-25 | ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) | Min Kyu Jeong |
