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path: root/src/cpu/o3/thread_context.hh
AgeCommit message (Expand)Author
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5Geoffrey Blake
2012-01-30Merge with main repository.Gabe Black
2012-01-30MEM: Clean-up of Functional/Virtual/TranslatingPort remnantsAndreas Hansson
2012-01-28Merge with the main repo.Gabe Black
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
2011-10-31SE/FS: Make the functions available from the TC consistent between SE and FS.Gabe Black
2011-10-30SE/FS: Make getProcessPtr available in both modes, and get rid of FULL_SYSTEMs.Gabe Black
2011-10-16SE/FS: Include getMemPort in FS.Gabe Black
2011-10-16SE/FS: Build/expose vport in SE mode.Gabe Black
2011-10-16CPU: Make physPort and getPhysPort available in SE mode.Gabe Black
2011-09-09Decode: Pull instruction decoding out of the StaticInst class into its own.Gabe Black
2011-04-15includes: sort all includesNathan Binkert
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-09-13CPU: Get rid of the now unnecessary getInst/setInst family of functions.Gabe Black
2009-11-04o3: get rid of unused physmem pointerSteve Reinhardt
2009-09-23arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hhNathan Binkert
2009-07-08Registers: Get rid of the float register width parameter.Gabe Black
2009-07-08Registers: Add an ISA object which replaces the MiscRegFile.Gabe Black
2009-05-12inorder-bpred: edits to handle non-delay-slot ISAsKorey Sewell
2009-04-15Get rid of the Unallocated thread context state.Steve Reinhardt
2009-04-08tlb: Don't separate the TLB classes into an instruction TLB and a data TLBGabe Black
2009-02-27Processes: Make getting and setting system call arguments part of a process o...Gabe Black
2009-01-19thread_context: move getSystemPtr so SE mode can get to it.Nathan Binkert
2008-11-04get rid of all instances of readTid() and getThreadNum(). Unify and eliminateLisa Hsu
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
2008-10-12Get rid of old RegContext code.Gabe Black
2008-10-09O3: Generalize the O3 CPU object so it isn't split out by ISA.Gabe Black
2008-07-01Remove delVirtPort() and make getVirtPort() only return cached version.Ali Saidi
2008-07-01Make the cached virtPort have a thread context so it can do everything that a...Ali Saidi
2007-11-15add microPC stuff back in. got deleted on changeset propragation somehow.Korey Sewell
2007-11-15Get MIPS simple regression working. Take out unecessary functions "setShadowS...Korey Sewell
2007-11-13Add in files from merge-bare-iron, get them compiling in FS and SE modeKorey Sewell
2007-08-26Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.Gabe Black
2007-03-07*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscRegAli Saidi
2006-12-07Compilation fixesGabe Black
2006-12-06Got rid of some typedefs and moved the tlbs into the base o3 cpu.Gabe Black
2006-11-29Change the connecting of the physPort and virtPort to the memory object below...Kevin Lim
2006-11-19Update Virtual and Physical ports.Kevin Lim
2006-11-07Moved the switched version of kernel_stats.hh back to kern, and moved the bas...Gabe Black
2006-11-01Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...Gabe Black
2006-07-23This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds,...Korey Sewell
2006-07-07Fix so that O3CPU doesnt segfault on exit.Korey Sewell
2006-07-03Fix for FS O3CPU compile ... missing forward class declaration/header file af...Korey Sewell
2006-06-30Make O3CPU model independent of the ISAKorey Sewell