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path: root/src/cpu/o3/thread_context_impl.hh
AgeCommit message (Expand)Author
2019-02-08cpu: fixed how O3 CPU executes an exit system callTuan Ta
2019-02-01cpu, arch: Replace the CCReg type with RegVal.Gabe Black
2019-01-31arch: cpu: Rename *FloatRegBits* to *FloatReg*.Gabe Black
2019-01-30arch,cpu: Add vector predicate registersGiacomo Gabrielli
2019-01-25cpu, arch, arch-arm: Wire unused VecElem code in the O3 modelGiacomo Travaglini
2019-01-22arch: cpu: Stop passing around misc registers by reference.Gabe Black
2019-01-16cpu: dev: sim: gpu-compute: Banish some ISA specific register types.Gabe Black
2018-12-20arch, cpu: Remove float type accessors.Gabe Black
2018-01-10style: change C/C++ source permissions to noexecBKP
2017-11-21cpu-o3: Prevent cpu from suspending if it is already drainingNikos Nikoleris
2017-09-11stats: Get rid of some kernel stats related cruft.Gabe Black
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2015-07-28revert 5af8f40d8f2cNilay Vaish
2015-07-26cpu: implements vector registersNilay Vaish
2014-09-20alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivateMitch Hayenga
2014-01-24arch, cpu: Add support for flattening misc register indexes.Ali Saidi
2013-10-17cpu: add consistent guarding to *_impl.hh files.Matt Horsnell
2013-10-15cpu: add a condition-code register classYasuko Eckert
2013-01-22x86, cpu: corrects 270c9a75e91f, take over decoder on cpu switchNilay Vaish
2013-01-07cpu: Fix broken thread context handoverAndreas Sandberg
2013-01-07o3 cpu: Remove unused variablesAndreas Sandberg
2013-01-07cpu: Unify SimpleCPU and O3 CPU serialization codeAndreas Sandberg
2013-01-07cpu: Implement a flat register interface in thread contextsAndreas Sandberg
2013-01-07arch: Make the ISA class inherit from SimObjectAndreas Sandberg
2013-01-07cpu: rename the misleading inSyscall to noSquashFromTCAli Saidi
2012-08-28Clock: Add a Cycles wrapper class and use where applicableAndreas Hansson
2012-03-09CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectableGeoffrey Blake
2012-02-24MEM: Make port proxies use references rather than pointersAndreas Hansson
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5Geoffrey Blake
2012-01-28Merge with the main repo.Gabe Black
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
2011-11-18SE/FS: Get rid of FULL_SYSTEM in the CPU directory.Gabe Black
2011-10-31SE/FS: Make the functions available from the TC consistent between SE and FS.Gabe Black
2011-10-30SE/FS: Make getProcessPtr available in both modes, and get rid of FULL_SYSTEMs.Gabe Black
2011-10-16SE/FS: Build/expose vport in SE mode.Gabe Black
2011-08-19Fix bugs due to interaction between SEV instructions and O3 pipelineGeoffrey Blake
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2011-04-04ARM: Fix checkpoint restoration into O3 CPU and the way O3 switchCpu works.Ali Saidi
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
2010-11-15O3: reset architetural state by calling clear()Ali Saidi
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-09-13CPU: Get rid of the now unnecessary getInst/setInst family of functions.Gabe Black
2010-06-23O3ThreadContext: When taking over from a previous context, only assert thatTimothy M. Jones
2009-09-23arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hhNathan Binkert
2009-07-08Registers: Add a registers.hh file as an ISA switched header.Gabe Black
2009-07-08Registers: Get rid of the float register width parameter.Gabe Black
2009-07-08Registers: Add an ISA object which replaces the MiscRegFile.Gabe Black
2009-05-26types: add a type for thread IDs and try to use it everywhereNathan Binkert