Age | Commit message (Expand) | Author |
2019-05-30 | cpu, sim: Return PortProxy &s from all the proxy accessors. | Gabe Black |
2019-04-22 | cpu: Eliminate the ProxyThreadContext class. | Gabe Black |
2019-02-08 | cpu: fixed how O3 CPU executes an exit system call | Tuan Ta |
2019-02-01 | cpu, arch: Replace the CCReg type with RegVal. | Gabe Black |
2019-01-31 | arch: cpu: Rename *FloatRegBits* to *FloatReg*. | Gabe Black |
2019-01-30 | arch,cpu: Add vector predicate registers | Giacomo Gabrielli |
2019-01-25 | cpu, arch, arch-arm: Wire unused VecElem code in the O3 model | Giacomo Travaglini |
2019-01-22 | arch: cpu: Stop passing around misc registers by reference. | Gabe Black |
2019-01-16 | cpu: dev: sim: gpu-compute: Banish some ISA specific register types. | Gabe Black |
2018-12-20 | arch, cpu: Remove float type accessors. | Gabe Black |
2018-01-10 | style: change C/C++ source permissions to noexec | BKP |
2017-11-21 | cpu-o3: Prevent cpu from suspending if it is already draining | Nikos Nikoleris |
2017-09-11 | stats: Get rid of some kernel stats related cruft. | Gabe Black |
2017-07-05 | cpu: Added interface for vector reg file | Rekai Gonzalez-Alberquilla |
2017-07-05 | cpu: Simplify the rename interface and use RegId | Rekai Gonzalez-Alberquilla |
2015-07-28 | revert 5af8f40d8f2c | Nilay Vaish |
2015-07-26 | cpu: implements vector registers | Nilay Vaish |
2014-09-20 | alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate | Mitch Hayenga |
2014-01-24 | arch, cpu: Add support for flattening misc register indexes. | Ali Saidi |
2013-10-17 | cpu: add consistent guarding to *_impl.hh files. | Matt Horsnell |
2013-10-15 | cpu: add a condition-code register class | Yasuko Eckert |
2013-01-22 | x86, cpu: corrects 270c9a75e91f, take over decoder on cpu switch | Nilay Vaish |
2013-01-07 | cpu: Fix broken thread context handover | Andreas Sandberg |
2013-01-07 | o3 cpu: Remove unused variables | Andreas Sandberg |
2013-01-07 | cpu: Unify SimpleCPU and O3 CPU serialization code | Andreas Sandberg |
2013-01-07 | cpu: Implement a flat register interface in thread contexts | Andreas Sandberg |
2013-01-07 | arch: Make the ISA class inherit from SimObject | Andreas Sandberg |
2013-01-07 | cpu: rename the misleading inSyscall to noSquashFromTC | Ali Saidi |
2012-08-28 | Clock: Add a Cycles wrapper class and use where applicable | Andreas Hansson |
2012-03-09 | CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable | Geoffrey Blake |
2012-02-24 | MEM: Make port proxies use references rather than pointers | Andreas Hansson |
2012-01-31 | Merge with head, hopefully the last time for this batch. | Gabe Black |
2012-01-31 | CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5 | Geoffrey Blake |
2012-01-28 | Merge with the main repo. | Gabe Black |
2012-01-17 | MEM: Add port proxies instead of non-structural ports | Andreas Hansson |
2011-11-18 | SE/FS: Get rid of FULL_SYSTEM in the CPU directory. | Gabe Black |
2011-10-31 | SE/FS: Make the functions available from the TC consistent between SE and FS. | Gabe Black |
2011-10-30 | SE/FS: Make getProcessPtr available in both modes, and get rid of FULL_SYSTEMs. | Gabe Black |
2011-10-16 | SE/FS: Build/expose vport in SE mode. | Gabe Black |
2011-08-19 | Fix bugs due to interaction between SEV instructions and O3 pipeline | Geoffrey Blake |
2011-04-15 | trace: reimplement the DTRACE function so it doesn't use a vector | Nathan Binkert |
2011-04-04 | ARM: Fix checkpoint restoration into O3 CPU and the way O3 switchCpu works. | Ali Saidi |
2011-01-07 | Replace curTick global variable with accessor functions. | Steve Reinhardt |
2010-11-15 | O3: reset architetural state by calling clear() | Ali Saidi |
2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
2010-09-13 | CPU: Get rid of the now unnecessary getInst/setInst family of functions. | Gabe Black |
2010-06-23 | O3ThreadContext: When taking over from a previous context, only assert that | Timothy M. Jones |
2009-09-23 | arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh | Nathan Binkert |
2009-07-08 | Registers: Add a registers.hh file as an ISA switched header. | Gabe Black |
2009-07-08 | Registers: Get rid of the float register width parameter. | Gabe Black |