gem5 - gem5

Age	Commit message (Expand)	Author
2007-11-15	add thread id to misc. reg functions	Korey Sewell
2007-11-15	add microPC stuff back in. got deleted on changeset propragation somehow.	Korey Sewell
2007-11-15	put the flattenIndex stuff back in O3 AND put fatal() back in faults	Korey Sewell
2007-11-15	Get MIPS simple regression working. Take out unecessary functions "setShadowS...	Korey Sewell
2007-11-15	branch merge	Korey Sewell
2007-11-13	Add in files from merge-bare-iron, get them compiling in FS and SE mode	Korey Sewell
2007-11-12	X86: Implement a page table walker.	Gabe Black
2007-11-12	X86: Make the micropc available through the thread context objects.	Gabe Black
2007-11-06	O3: Remove unneeded variable.	Gabe Black
2007-10-31	Traceflags: Add SCons function to created a traceflag instead of having one f...	Ali Saidi
2007-10-02	CPU: Make the cpuid parameter get set in SE mode as well.	Gabe Black
2007-10-02	CPU: Make the cpus check the pc event queues in SE mode.	Gabe Black
2007-10-02	CPU: Make sure the system parameter gets set in the cpu builders. Other param...	Gabe Black
2007-09-28	Rename cycles() function to ticks()	Ali Saidi
2007-09-28	Update statistics to use cycles properly instead of ticks	Ali Saidi
2007-09-19	X86: Put in the foundation for x87 stack based fp registers.	Gabe Black
2007-08-30	params: Deprecate old-style constructors; update most SimObject constructors.	Miles Kaufmann
2007-08-26	Merge with head	Gabe Black
2007-08-26	Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.	Gabe Black
2007-08-21	Merge with head.	Gabe Black
2007-08-21	o3: Fix for retry ID bug.	Kevin Lim
2007-08-13	O3: Set up the predicted npc and nnpc for a fault carrying noop so that it do...	Gabe Black
2007-08-13	Move the "translate" member functions back into the base o3 class.	Gabe Black
2007-07-31	Merge from head.	Steve Reinhardt
2007-07-30	Fix problem with tracer not being initialized.	Gabe Black
2007-07-29	Merge Gabe's changes from head.	Steve Reinhardt
2007-07-28	Turn the instruction tracing code into pluggable sim objects.	Gabe Black
2007-07-26	Merge python and x86 changes with cache branch	Nathan Binkert
2007-07-26	X86: Fix argument register indexing.	Gabe Black
2007-07-23	Major changes to how SimObjects are created and initialized. Almost all	Nathan Binkert
2007-07-23	Fix WriteReq/StoreCondReq setting in O3.	Steve Reinhardt
2007-07-15	Fix up a bunch of multilevel coherence issues.	Steve Reinhardt
2007-06-30	Make CPU models use new LoadLockedReq/StoreCondReq commands.	Steve Reinhardt
2007-06-30	Event descriptions should not end in "event"	Steve Reinhardt
2007-06-30	Get rid of Packet result field. Error responses are	Steve Reinhardt
2007-06-28	o3cpu build for mips	Korey Sewell
2007-06-21	Merge zizzer.eecs.umich.edu:/bk/newmem	Gabe Black
2007-06-20	Fix compiler errors.	Gabe Black
2007-06-20	Don't do checker stuff if the checker is not defined	Nathan Binkert
2007-06-20	Make sure all parameters have default values if they're	Nathan Binkert
2007-06-19	Merge zizzer.eecs.umich.edu:/bk/newmem	Gabe Black
2007-06-19	Make branches work by repopulating the predecoder every time through. This is...	Gabe Black
2007-06-13	Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "more...	Gabe Black
2007-06-09	Use the right type	Nathan Binkert
2007-06-01	Fix typo so m5.fast will compile	Nathan Binkert
2007-06-01	don't generate trace data unless tracing is on	Ali Saidi
2007-05-30	Fix cut-n-pasto to make the path correct	Nathan Binkert
2007-05-27	Move SimObject python files alongside the C++ and fix	Nathan Binkert
2007-05-21	Change getDeviceAddressRanges to use bool for snoop arg.	Steve Reinhardt
2007-05-12	Make sure all addresses used in syscalls are truncated to 32 bits. Actually -...	Gabe Black