gem5 - gem5

Age	Commit message (Expand)	Author
2011-10-31	GCC: Get everything working with gcc 4.6.1.	Gabe Black
2011-10-30	SE/FS: Make getProcessPtr available in both modes, and get rid of FULL_SYSTEMs.	Gabe Black
2011-10-30	SE/FS: Build the base process class in FS.	Gabe Black
2011-10-16	SE/FS: Include getMemPort in FS.	Gabe Black
2011-10-16	SE/FS: Build/expose vport in SE mode.	Gabe Black
2011-10-16	CPU: Make physPort and getPhysPort available in SE mode.	Gabe Black
2011-09-27	O3: Tidy up some DPRINTFs in the LSQ.	Gabe Black
2011-09-27	Faults: Replace calls to genMachineCheckFault with M5PanicFault.	Gabe Black
2011-09-26	LSQ: Moved a couple of lines to enable O3 + Ruby	Nilay Vaish
2011-09-22	event: minor cleanup	Steve Reinhardt
2011-09-19	Syscall: Make the syscall function available in both SE and FS modes.	Gabe Black
2011-09-13	LSQ: Only trigger a memory violation with a load/load if the value changes.	Ali Saidi
2011-09-09	Decode: Pull instruction decoding out of the StaticInst class into its own.	Gabe Black
2011-08-19	LSQ: Set store predictor to periodically clear itself as recommended in the s...	Ali Saidi
2011-08-19	Fix bugs due to interaction between SEV instructions and O3 pipeline	Geoffrey Blake
2011-08-19	LSQ: Add some better dprintfs for storeset predictor.	Mrinmoy Ghosh
2011-08-19	LSQ: Fix a few issues with the storeset predictor.	Mrinmoy Ghosh
2011-08-19	O3: Squash the violator and younger instructions instead not all insts.	Giacomo Gabrielli
2011-08-16	O3: Make lsq_unit.hh include arch/isa_traits.hh directly, not transitively.	Gabe Black
2011-08-14	O3: When squashing, restore the macroop that should be used for fetching.	Gabe Black
2011-08-14	O3: Add a pointer to the macroop for a microop in the dyninst.	Gabe Black
2011-08-13	O3: At the end of an instruction, force fetchAddr to something sensible.	Gabe Black
2011-08-09	O3: Stop using the current macroop no matter why you're leaving it.	Gabe Black
2011-08-09	O3: When waiting to handle an interrupt, let everything drain out.	Gabe Black
2011-08-07	O3: Get rid of the unused addToRemoveList function.	Gabe Black
2011-08-07	O3: Let squashed and deferred instructions issue.	Gabe Black
2011-08-02	O3: Get rid of the raw ExtMachInst constructor on DynInsts.	Gabe Black
2011-07-31	O3: Implement memory mapped IPRs for O3.	Gabe Black
2011-07-30	O3: Fix corner case squashing into the microcode ROM.	Gabe Black
2011-07-15	O3: Create a pipeline activity viewer for the O3 CPU model.	Giacomo Gabrielli
2011-07-10	O3: Fix up pipelining icache accesses in fetch stage to function properly	Geoffrey Blake
2011-07-10	O3: Make sure fetch doesn't go off into the weeds during speculation.	Ali Saidi
2011-06-10	o3: missing newlines on some dprintfs	Korey Sewell
2011-06-02	scons: rename TraceFlags to DebugFlags	Nathan Binkert
2011-05-23	O3: Fix offset calculation into storeQueue buffer for store->load forwarding	Geoffrey Blake
2011-05-23	O3: Fix issue w/wbOutstading being decremented multiple times on blocked cache.	Geoffrey Blake
2011-05-23	O3: Fix issue with interrupts/faults occuring in the middle of a macro-op	Geoffrey Blake
2011-05-13	O3: Fix an issue with a load & branch instruction and mem dep squashing	Geoffrey Blake
2011-05-04	O3: Remove assertion for case that is actually handled in code.	Ali Saidi
2011-05-04	O3: Fix a small corner case with the lsq hazard detection logic.	Ali Saidi
2011-04-20	stats: one more name violation	Nathan Binkert
2011-04-19	stats: rename stats so they can be used as python expressions	Nathan Binkert
2011-04-15	trace: reimplement the DTRACE function so it doesn't use a vector	Nathan Binkert
2011-04-15	includes: fix up code after sorting	Nathan Binkert
2011-04-15	includes: sort all includes	Nathan Binkert
2011-04-04	ARM: Fix checkpoint restoration into O3 CPU and the way O3 switchCpu works.	Ali Saidi
2011-04-04	ARM: Cleanup implementation of ITSTATE and put important code in PCState.	Ali Saidi
2011-04-04	CPU: Remove references to memory copy operations	Ali Saidi
2011-04-04	O3: Tighten memory order violation checking to 16 bytes.	Ali Saidi
2011-03-17	O3: Send instruction back to fetch on squash to seed predecoder correctly.	Ali Saidi