Age | Commit message (Expand) | Author |
2017-12-22 | arch,cpu: "virtualize" the TLB interface. | Gabe Black |
2017-12-22 | cpu: Use the generic nop static inst instead of decoding the arch version. | Gabe Black |
2017-12-13 | cpu,alpha,mips,power,riscv,sparc: Get rid of eaComp and memAccInst. | Gabe Black |
2017-12-05 | cpu: Add support for CMOs in the cpu models | Nikos Nikoleris |
2017-12-04 | misc: Rename misc.(hh|cc) to logging.(hh|cc) | Gabe Black |
2017-11-28 | cpu-o3: Add missing vector stat initializers | Andreas Sandberg |
2017-11-21 | cpu, cpu, sim: move Cycle probe update | Jose Marinho |
2017-11-21 | cpu-o3: Prevent cpu from suspending if it is already draining | Nikos Nikoleris |
2017-11-20 | pwr: Adds logic to enter power gating for the cpu model | Anouk Van Laer |
2017-11-14 | cpu, probe: Fix elastic trace register dependency | Radhika Jagtap |
2017-10-19 | cpu-o3: Add M5_VAR_USED to variable | Jason Lowe-Power |
2017-10-13 | cpu-o3: Check predication before the SQ size for a debug print | Nikos Nikoleris |
2017-10-13 | cpu-o3: Avoid early checker verification for store conditionals | Nikos Nikoleris |
2017-09-11 | stats: Get rid of some kernel stats related cruft. | Gabe Black |
2017-08-30 | cpu-o3: fix data pkt initialization for split load | Matthias Hille |
2017-07-19 | cpu: Add missing rename of vector registers in the O3 CPU | Rekai Gonzalez-Alberquilla |
2017-07-17 | cpu,o3: Fixed checkpointing bug occuring in the o3 CPU | Anouk Van Laer |
2017-07-12 | cpu: Refactor some Event subclasses to lambdas | Sean Wilson |
2017-07-05 | arch: ISA parser additions of vector registers | Rekai Gonzalez-Alberquilla |
2017-07-05 | cpu: Added interface for vector reg file | Rekai Gonzalez-Alberquilla |
2017-07-05 | cpu: Simplify the rename interface and use RegId | Rekai Gonzalez-Alberquilla |
2017-07-05 | cpu: Physical register structural + flat indexing | Nathanael Premillieu |
2017-07-05 | arch, cpu: Architectural Register structural indexing | Nathanael Premillieu |
2017-06-20 | cpu, gpu-compute: Replace EventWrapper use with EventFunctionWrapper | Sean Wilson |
2017-05-15 | cpu: fix problem with forwarding and locked load | Alec Roelke |
2017-02-27 | syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess s... | Brandon Potter |
2015-07-20 | syscall_emul: [patch 13/22] add system call retry capability | Brandon Potter |
2016-11-09 | style: [patch 1/22] use /r/3648/ to reorganize includes | Brandon Potter |
2016-12-21 | cpu: Resolve targets of predicted 'taken' decode for O3 | Arthur Perais |
2016-12-21 | cpu: Clarify meaning of cachePorts variable in lsq_unit.hh of O3 | Arthur Perais |
2016-10-15 | cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClass | Fernando Endo |
2016-09-22 | cpu: Fix the O3 CPU Drain | Rekai Gonzalez-Alberquilla |
2016-09-13 | sim: Refactor quiesce and remove FS asserts | Michael LeBeane |
2016-06-06 | pwr: Low-power idle power state for idle CPUs | David Guillen Fandos |
2016-06-06 | stats: Fixing regStats function for some SimObjects | David Guillen Fandos |
2016-04-07 | mem: Remove threadId from memory request class | Mitch Hayenga |
2016-04-06 | Revert power patch sets with unexpected interactions | Andreas Sandberg |
2016-04-05 | mem: Remove threadId from memory request class | Mitch Hayenga |
2014-12-09 | power: Low-power idle power state for idle CPUs | Akash Bagdia |
2015-05-05 | cpu: Change literal integer constants to meaningful labels | Rekai Gonzalez Alberquilla |
2015-11-27 | base: Add support for changing output directories | Andreas Sandberg |
2015-08-10 | mem, cpu: Add assertions to snoop invalidation logic | Stephan Diestelhorst |
2015-07-19 | cpu: Fix LLSC atomic CPU wakeup | Krishnendra Nathella |
2016-02-10 | mem: Deduce if cache should forward snoops | Andreas Hansson |
2016-02-06 | style: fix missing spaces in control statements | Steve Reinhardt |
2016-02-06 | style: remove trailing whitespace | Steve Reinhardt |
2016-01-17 | cpu: remove unnecessary data ptr from O3 internal read() funcs | Steve Reinhardt |
2015-12-31 | mem: Make cache terminology easier to understand | Andreas Hansson |
2015-12-07 | cpu: Support virtual addr in elastic traces | Radhika Jagtap |
2015-12-07 | cpu: Create record type enum for elastic traces | Radhika Jagtap |