gem5 - gem5

Age	Commit message (Expand)	Author
2008-08-11	params: Convert the CPU objects to use the auto generated param structs.	Nathan Binkert
2008-07-01	Remove delVirtPort() and make getVirtPort() only return cached version.	Ali Saidi
2008-07-01	Make the cached virtPort have a thread context so it can do everything that a...	Ali Saidi
2008-06-28	Backed out changeset 94a7bb476fca: caused memory leak.	Steve Reinhardt
2008-06-21	Generate more useful error messages for unconnected ports.	Steve Reinhardt
2008-03-24	Don't FastAlloc MSHRs since we don't allocate them on the fly.	Steve Reinhardt
2008-02-27	Add comments in code to describe bug conditions.	Korey Sewell
2008-02-27	Fix Load/Store Queue squashing after a SMT thread is removed but ensuring	Korey Sewell
2008-02-27	Fix offset in removeThread() function so that float registers start freeing up	Korey Sewell
2008-02-26	TLB: Make a TLB base class and put a virtual demapPage function in it.	Gabe Black
2008-02-06	Make the Event::description() a const function	Stephen Hines
2008-02-05	Add base ARM code to M5	Stephen Hines
2008-01-14	The reason is that the event is supposed to put the instructions ready to exe...	Ke Meng
2008-01-02	Add functional PrintReq command for memory-system debugging.	Steve Reinhardt
2007-11-15	add thread id to misc. reg functions	Korey Sewell
2007-11-15	add microPC stuff back in. got deleted on changeset propragation somehow.	Korey Sewell
2007-11-15	put the flattenIndex stuff back in O3 AND put fatal() back in faults	Korey Sewell
2007-11-15	Get MIPS simple regression working. Take out unecessary functions "setShadowS...	Korey Sewell
2007-11-15	branch merge	Korey Sewell
2007-11-13	Add in files from merge-bare-iron, get them compiling in FS and SE mode	Korey Sewell
2007-11-12	X86: Implement a page table walker.	Gabe Black
2007-11-12	X86: Make the micropc available through the thread context objects.	Gabe Black
2007-11-06	O3: Remove unneeded variable.	Gabe Black
2007-10-31	Traceflags: Add SCons function to created a traceflag instead of having one f...	Ali Saidi
2007-10-02	CPU: Make the cpuid parameter get set in SE mode as well.	Gabe Black
2007-10-02	CPU: Make the cpus check the pc event queues in SE mode.	Gabe Black
2007-10-02	CPU: Make sure the system parameter gets set in the cpu builders. Other param...	Gabe Black
2007-09-28	Rename cycles() function to ticks()	Ali Saidi
2007-09-28	Update statistics to use cycles properly instead of ticks	Ali Saidi
2007-09-19	X86: Put in the foundation for x87 stack based fp registers.	Gabe Black
2007-08-30	params: Deprecate old-style constructors; update most SimObject constructors.	Miles Kaufmann
2007-08-26	Merge with head	Gabe Black
2007-08-26	Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.	Gabe Black
2007-08-21	Merge with head.	Gabe Black
2007-08-21	o3: Fix for retry ID bug.	Kevin Lim
2007-08-13	O3: Set up the predicted npc and nnpc for a fault carrying noop so that it do...	Gabe Black
2007-08-13	Move the "translate" member functions back into the base o3 class.	Gabe Black
2007-07-31	Merge from head.	Steve Reinhardt
2007-07-30	Fix problem with tracer not being initialized.	Gabe Black
2007-07-29	Merge Gabe's changes from head.	Steve Reinhardt
2007-07-28	Turn the instruction tracing code into pluggable sim objects.	Gabe Black
2007-07-26	Merge python and x86 changes with cache branch	Nathan Binkert
2007-07-26	X86: Fix argument register indexing.	Gabe Black
2007-07-23	Major changes to how SimObjects are created and initialized. Almost all	Nathan Binkert
2007-07-23	Fix WriteReq/StoreCondReq setting in O3.	Steve Reinhardt
2007-07-15	Fix up a bunch of multilevel coherence issues.	Steve Reinhardt
2007-06-30	Make CPU models use new LoadLockedReq/StoreCondReq commands.	Steve Reinhardt
2007-06-30	Event descriptions should not end in "event"	Steve Reinhardt
2007-06-30	Get rid of Packet result field. Error responses are	Steve Reinhardt
2007-06-28	o3cpu build for mips	Korey Sewell