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path: root/src/cpu/o3
AgeCommit message (Expand)Author
2007-07-31Merge from head.Steve Reinhardt
2007-07-30Fix problem with tracer not being initialized.Gabe Black
2007-07-29Merge Gabe's changes from head.Steve Reinhardt
2007-07-28Turn the instruction tracing code into pluggable sim objects.Gabe Black
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
2007-07-26X86: Fix argument register indexing.Gabe Black
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
2007-07-23Fix WriteReq/StoreCondReq setting in O3.Steve Reinhardt
2007-07-15Fix up a bunch of multilevel coherence issues.Steve Reinhardt
2007-06-30Make CPU models use new LoadLockedReq/StoreCondReq commands.Steve Reinhardt
2007-06-30Event descriptions should not end in "event"Steve Reinhardt
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
2007-06-28o3cpu build for mipsKorey Sewell
2007-06-21Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-06-20Fix compiler errors.Gabe Black
2007-06-20Don't do checker stuff if the checker is not definedNathan Binkert
2007-06-20Make sure all parameters have default values if they'reNathan Binkert
2007-06-19Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-06-19Make branches work by repopulating the predecoder every time through. This is...Gabe Black
2007-06-13Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "more...Gabe Black
2007-06-09Use the right typeNathan Binkert
2007-06-01Fix typo so m5.fast will compileNathan Binkert
2007-06-01don't generate trace data unless tracing is onAli Saidi
2007-05-30Fix cut-n-pasto to make the path correctNathan Binkert
2007-05-27Move SimObject python files alongside the C++ and fixNathan Binkert
2007-05-21Change getDeviceAddressRanges to use bool for snoop arg.Steve Reinhardt
2007-05-12Make sure all addresses used in syscalls are truncated to 32 bits. Actually -...Gabe Black
2007-05-09Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-04-26Remove extra delete that was causing segfault.Kevin Lim
2007-04-26Remove unnecessary check.Kevin Lim
2007-04-23Merge zizzer.eecs.umich.edu:/n/wexford/x/gblack/m5/newmem-o3-specGabe Black
2007-04-23Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemGabe Black
2007-04-22Merge ktlim@zizzer:/bk/newmemKevin Lim
2007-04-22Use proper cycles for IPC and CPI equations.Kevin Lim
2007-04-22Make the floating point zero register special handling only apply for ALPHA.Gabe Black
2007-04-21fixes for solaris compileAli Saidi
2007-04-15Make an inner loop which pulls microops out of macroops. These aren't checked...Gabe Black
2007-04-15Add extra constructors to Alpha and MIPSGabe Black
2007-04-14Add support for microcode and pull out the special branch delay slot handling...Gabe Black
2007-04-13Remove most of the special handling for delay slots since they have to be squ...Gabe Black
2007-04-09Merge ktlim@zizzer:/bk/newmemKevin Lim
2007-04-09Fix bug when blocking due to no free registers.Kevin Lim
2007-04-08Take into account that the flattened integer register space is a different si...Gabe Black
2007-04-08Get the "hard" SPARC instructions working in o3. I don't like that the IsStor...Gabe Black
2007-04-04Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-04-04Updates for other ISA cpu_builders.Kevin Lim
2007-04-04Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU f...Kevin Lim
2007-04-03Made the "data" field of store queue entries into a character array. It's siz...Gabe Black
2007-04-03Fix a memory leak. Hopefully this fixes the longer running benchmarks.Kevin Lim
2007-04-02Remove/comment out DPRINTFs that were causing a segfault.Kevin Lim
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