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path: root/src/cpu/o3
AgeCommit message (Expand)Author
2019-04-22fix the violation checking for IFT+fenceIru Cai
2019-04-17add a trackBranch optionIru Cai
2019-04-17IFT for fence schemeIru Cai
2019-04-16track instruction after tainted branchesIru Cai
2019-04-15Add IFT debug flagsIru Cai
2019-04-12add IEW DPRINTFIru Cai
2019-04-12keep time to expose as original scheme when inst->needPostFetch()Iru Cai
2019-04-12add IFT optionsIru Cai
2019-04-10clear taint when previous branch resolvedIru Cai
2019-04-08we need to ++loadsToVLD when (!inst->readyToExpose() && inst->needPostFetch())Iru Cai
2019-04-08implement taint propagationIru Cai
2019-04-03check loads using tainted registers, set USL dst as taintedIru Cai
2019-04-02methods to set taintIru Cai
2019-04-02add taint mapIru Cai
2019-04-02print load instIru Cai
2019-04-01fix getvaddr nullptr stuff, add a non-spec load printingis-rebase11-LSQUnitIru Cai
2019-03-21Request::getVaddr()Iru Cai
2019-03-20invisispec-1.0 sourceIru Cai
2018-12-11cpu-o3: Fix bug in LSQUnit(uint32_t, uint32_t) ctorTony Gutierrez
2018-12-03cpu: Change raw pointers to STL ContainersRekai Gonzalez-Alberquilla
2018-11-28cpu,arch-arm: Initialise data membersRekai Gonzalez-Alberquilla
2018-11-27arch, base, cpu, gpu, mem: Replace assert(0 or false with panic.Gabe Black
2018-11-16cpu: Fix the usage of const DynInstPtrRekai Gonzalez-Alberquilla
2018-08-10cpu: Removed unnecessary file reg_class_impl.hhBradley Wang
2018-07-24cpu-o3: Missing freeing the heads of DepGraph in IQ squashingHanhwi Jang
2018-06-11misc: Using smart pointers for memory RequestsGiacomo Travaglini
2018-06-11misc: Substitute pointer to Request with aliased RequestPtrGiacomo Travaglini
2018-03-27cpu: Remove ExtMachInst typedefs from the O3 CPU model.Gabe Black
2018-03-06scons: Switch from the print statement to the print function.Gabe Black
2018-02-20cpu-o3: Don't add non-speculative mem barriers to the IQ twiceAndreas Sandberg
2018-01-10style: change C/C++ source permissions to noexecBKP
2018-01-10alpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of ISA_HAS_DELAY_SLOT.Gabe Black
2018-01-09cpu: Use the NotAnInst flag to avoid passing an inst to fetch faults.Gabe Black
2017-12-22arch,cpu: "virtualize" the TLB interface.Gabe Black
2017-12-22cpu: Use the generic nop static inst instead of decoding the arch version.Gabe Black
2017-12-13cpu,alpha,mips,power,riscv,sparc: Get rid of eaComp and memAccInst.Gabe Black
2017-12-05cpu: Add support for CMOs in the cpu modelsNikos Nikoleris
2017-12-04misc: Rename misc.(hh|cc) to logging.(hh|cc)Gabe Black
2017-11-28cpu-o3: Add missing vector stat initializersAndreas Sandberg
2017-11-21cpu, cpu, sim: move Cycle probe updateJose Marinho
2017-11-21cpu-o3: Prevent cpu from suspending if it is already drainingNikos Nikoleris
2017-11-20pwr: Adds logic to enter power gating for the cpu modelAnouk Van Laer
2017-11-14cpu, probe: Fix elastic trace register dependencyRadhika Jagtap
2017-10-19cpu-o3: Add M5_VAR_USED to variableJason Lowe-Power
2017-10-13cpu-o3: Check predication before the SQ size for a debug printNikos Nikoleris
2017-10-13cpu-o3: Avoid early checker verification for store conditionalsNikos Nikoleris
2017-09-11stats: Get rid of some kernel stats related cruft.Gabe Black
2017-08-30cpu-o3: fix data pkt initialization for split loadMatthias Hille
2017-07-19cpu: Add missing rename of vector registers in the O3 CPURekai Gonzalez-Alberquilla
2017-07-17cpu,o3: Fixed checkpointing bug occuring in the o3 CPUAnouk Van Laer