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path: root/src/cpu/o3
AgeCommit message (Expand)Author
2007-11-15add microPC stuff back in. got deleted on changeset propragation somehow.Korey Sewell
2007-11-15put the flattenIndex stuff back in O3 AND put fatal() back in faultsKorey Sewell
2007-11-15Get MIPS simple regression working. Take out unecessary functions "setShadowS...Korey Sewell
2007-11-15branch mergeKorey Sewell
2007-11-13Add in files from merge-bare-iron, get them compiling in FS and SE modeKorey Sewell
2007-11-12X86: Implement a page table walker.Gabe Black
2007-11-12X86: Make the micropc available through the thread context objects.Gabe Black
2007-11-06O3: Remove unneeded variable.Gabe Black
2007-10-31Traceflags: Add SCons function to created a traceflag instead of having one f...Ali Saidi
2007-10-02CPU: Make the cpuid parameter get set in SE mode as well.Gabe Black
2007-10-02CPU: Make the cpus check the pc event queues in SE mode.Gabe Black
2007-10-02CPU: Make sure the system parameter gets set in the cpu builders. Other param...Gabe Black
2007-09-28Rename cycles() function to ticks()Ali Saidi
2007-09-28Update statistics to use cycles properly instead of ticksAli Saidi
2007-09-19X86: Put in the foundation for x87 stack based fp registers.Gabe Black
2007-08-30params: Deprecate old-style constructors; update most SimObject constructors.Miles Kaufmann
2007-08-26Merge with headGabe Black
2007-08-26Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.Gabe Black
2007-08-21Merge with head.Gabe Black
2007-08-21o3: Fix for retry ID bug.Kevin Lim
2007-08-13O3: Set up the predicted npc and nnpc for a fault carrying noop so that it do...Gabe Black
2007-08-13Move the "translate" member functions back into the base o3 class.Gabe Black
2007-07-31Merge from head.Steve Reinhardt
2007-07-30Fix problem with tracer not being initialized.Gabe Black
2007-07-29Merge Gabe's changes from head.Steve Reinhardt
2007-07-28Turn the instruction tracing code into pluggable sim objects.Gabe Black
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
2007-07-26X86: Fix argument register indexing.Gabe Black
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
2007-07-23Fix WriteReq/StoreCondReq setting in O3.Steve Reinhardt
2007-07-15Fix up a bunch of multilevel coherence issues.Steve Reinhardt
2007-06-30Make CPU models use new LoadLockedReq/StoreCondReq commands.Steve Reinhardt
2007-06-30Event descriptions should not end in "event"Steve Reinhardt
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
2007-06-28o3cpu build for mipsKorey Sewell
2007-06-21Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-06-20Fix compiler errors.Gabe Black
2007-06-20Don't do checker stuff if the checker is not definedNathan Binkert
2007-06-20Make sure all parameters have default values if they'reNathan Binkert
2007-06-19Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-06-19Make branches work by repopulating the predecoder every time through. This is...Gabe Black
2007-06-13Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "more...Gabe Black
2007-06-09Use the right typeNathan Binkert
2007-06-01Fix typo so m5.fast will compileNathan Binkert
2007-06-01don't generate trace data unless tracing is onAli Saidi
2007-05-30Fix cut-n-pasto to make the path correctNathan Binkert
2007-05-27Move SimObject python files alongside the C++ and fixNathan Binkert
2007-05-21Change getDeviceAddressRanges to use bool for snoop arg.Steve Reinhardt
2007-05-12Make sure all addresses used in syscalls are truncated to 32 bits. Actually -...Gabe Black
2007-05-09Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
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