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path: root/src/cpu/o3
AgeCommit message (Expand)Author
2008-08-11params: Convert the CPU objects to use the auto generated param structs.Nathan Binkert
2008-07-01Remove delVirtPort() and make getVirtPort() only return cached version.Ali Saidi
2008-07-01Make the cached virtPort have a thread context so it can do everything that a...Ali Saidi
2008-06-28Backed out changeset 94a7bb476fca: caused memory leak.Steve Reinhardt
2008-06-21Generate more useful error messages for unconnected ports.Steve Reinhardt
2008-03-24Don't FastAlloc MSHRs since we don't allocate them on the fly.Steve Reinhardt
2008-02-27Add comments in code to describe bug conditions.Korey Sewell
2008-02-27Fix Load/Store Queue squashing after a SMT thread is removed but ensuringKorey Sewell
2008-02-27Fix offset in removeThread() function so that float registers start freeing upKorey Sewell
2008-02-26TLB: Make a TLB base class and put a virtual demapPage function in it.Gabe Black
2008-02-06Make the Event::description() a const functionStephen Hines
2008-02-05Add base ARM code to M5Stephen Hines
2008-01-14The reason is that the event is supposed to put the instructions ready to exe...Ke Meng
2008-01-02Add functional PrintReq command for memory-system debugging.Steve Reinhardt
2007-11-15add thread id to misc. reg functionsKorey Sewell
2007-11-15add microPC stuff back in. got deleted on changeset propragation somehow.Korey Sewell
2007-11-15put the flattenIndex stuff back in O3 AND put fatal() back in faultsKorey Sewell
2007-11-15Get MIPS simple regression working. Take out unecessary functions "setShadowS...Korey Sewell
2007-11-15branch mergeKorey Sewell
2007-11-13Add in files from merge-bare-iron, get them compiling in FS and SE modeKorey Sewell
2007-11-12X86: Implement a page table walker.Gabe Black
2007-11-12X86: Make the micropc available through the thread context objects.Gabe Black
2007-11-06O3: Remove unneeded variable.Gabe Black
2007-10-31Traceflags: Add SCons function to created a traceflag instead of having one f...Ali Saidi
2007-10-02CPU: Make the cpuid parameter get set in SE mode as well.Gabe Black
2007-10-02CPU: Make the cpus check the pc event queues in SE mode.Gabe Black
2007-10-02CPU: Make sure the system parameter gets set in the cpu builders. Other param...Gabe Black
2007-09-28Rename cycles() function to ticks()Ali Saidi
2007-09-28Update statistics to use cycles properly instead of ticksAli Saidi
2007-09-19X86: Put in the foundation for x87 stack based fp registers.Gabe Black
2007-08-30params: Deprecate old-style constructors; update most SimObject constructors.Miles Kaufmann
2007-08-26Merge with headGabe Black
2007-08-26Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.Gabe Black
2007-08-21Merge with head.Gabe Black
2007-08-21o3: Fix for retry ID bug.Kevin Lim
2007-08-13O3: Set up the predicted npc and nnpc for a fault carrying noop so that it do...Gabe Black
2007-08-13Move the "translate" member functions back into the base o3 class.Gabe Black
2007-07-31Merge from head.Steve Reinhardt
2007-07-30Fix problem with tracer not being initialized.Gabe Black
2007-07-29Merge Gabe's changes from head.Steve Reinhardt
2007-07-28Turn the instruction tracing code into pluggable sim objects.Gabe Black
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
2007-07-26X86: Fix argument register indexing.Gabe Black
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
2007-07-23Fix WriteReq/StoreCondReq setting in O3.Steve Reinhardt
2007-07-15Fix up a bunch of multilevel coherence issues.Steve Reinhardt
2007-06-30Make CPU models use new LoadLockedReq/StoreCondReq commands.Steve Reinhardt
2007-06-30Event descriptions should not end in "event"Steve Reinhardt
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
2007-06-28o3cpu build for mipsKorey Sewell